A circuit includes a first transistor having a control terminal and a current path between first and second current path terminals. A second transistor has a control terminal and a current path between first and second current path terminals. The first current path terminal of the first transistor is coupled to the first current path terminal of the second transistor at an intermediate point. A first current buffer has an input and an output. The input of the first current buffer is coupled to the second current path terminal of the first transistor. A second current buffer has an input and an output, the input of the second current buffer being coupled to the second current path terminal of the second transistor. A summation node is coupled to the outputs of the first and second current buffer.

Disclosed are electronic fuse management systems and techniques. For instance, an electronic fuse management system is described. The electronic fuse management system receives an indication of a value to be written to a plurality of electronic fuses. The system combines the value with a codeword to determine a pattern for the plurality of electronic fuses. The codeword is based on a previous pattern of the plurality of electronic fuses. In some examples, the system processes the previous pattern with a codeword function (e.g., a non-systematic Hamming codeword function) to generate the codeword. In some examples the system determines an exclusive or (XOR) of the value and the codeword to combine the value with the codeword. The system sets (e.g., writes to) a subset of the plurality of electronic fuses according to the pattern.

Disclosed are electronic fuse management systems and techniques. For instance, an electronic fuse management system is described. The electronic fuse management system receives an indication of a value to be written to a plurality of electronic fuses. The system combines the value with a codeword to determine a pattern for the plurality of electronic fuses. The codeword is based on a previous pattern of the plurality of electronic fuses. In some examples, the system processes the previous pattern with a codeword function (e.g., a non-systematic Hamming codeword function) to generate the codeword. In some examples the system determines an exclusive or (XOR) of the value and the codeword to combine the value with the codeword. The system sets (e.g., writes to) a subset of the plurality of electronic fuses according to the pattern.

Power management systems are described. In an embodiment, a power management system includes a voltage source, a circuit load located within a chip, and a switched capacitor voltage regulator (SCVR) coupled to voltage source and the circuit load to receive an input voltage from the voltage source and supply an output voltage to the circuit load. The SCVR may include circuitry located within the chip and a discrete integrated passive device (IPD) connected to the chip.

Power management systems are described. In an embodiment, a power management system includes a voltage source, a circuit load located within a chip, and a switched capacitor voltage regulator (SCVR) coupled to voltage source and the circuit load to receive an input voltage from the voltage source and supply an output voltage to the circuit load. The SCVR may include circuitry located within the chip and a discrete integrated passive device (IPD) connected to the chip.