A system, method, and computer program product for determining “impact quantify measure-based” service chains cross interferences. The method includes quantifying the impact of one service chain on another service chain and to what extent so as facilitate making an informed decision whether to garner more resources and to fine tune the computational services for the service chain. There is further provided beforehand a certainty of required computational resources and the providing the impact or interferences details of one service chain on another helps in minimization of service quality degradation failures. The framework further runs a method step to apply a mutual convexity method on service chains to aid in forecasting cross interferences between chains and includes a step wherein, interferences between both dependent and independent service chain is calculated and provided. The provided interferences calculated result set will ensure while provisioning of virtual network functions doesn't consume energy excessively.

A system, method, and computer program product for determining “impact quantify measure-based” service chains cross interferences. The method includes quantifying the impact of one service chain on another service chain and to what extent so as facilitate making an informed decision whether to garner more resources and to fine tune the computational services for the service chain. There is further provided beforehand a certainty of required computational resources and the providing the impact or interferences details of one service chain on another helps in minimization of service quality degradation failures. The framework further runs a method step to apply a mutual convexity method on service chains to aid in forecasting cross interferences between chains and includes a step wherein, interferences between both dependent and independent service chain is calculated and provided. The provided interferences calculated result set will ensure while provisioning of virtual network functions doesn't consume energy excessively.

Example techniques related to battery-powered playback devices. In an example, a first battery-powered playback device receives audio content from a network device and forwards the audio content to a second playback device for synchronous playback of the audio content with the second playback device, plays back the audio content, detects that a battery level of a battery of the first playback device has fallen below a predefined threshold, and ceases the forwarding of the audio content after the battery level of the battery of the first playback device has fallen below the predefined threshold. After the battery level of the first playback device has fallen below the predefined threshold, the second playback device receives the audio content from the network device, forwards the audio content to the first playback device for synchronous playback with the first playback device, and plays back the audio content in synchrony with the first playback device.

System on chip including plurality of processors including first and second processors; plurality of intellectual properties (IPs) including first and second IPs; memory interface; internal clock circuit to receive reference clock signal, generate first internal clock signal, and provide first internal clock signal to first IP; memory interface clock circuit to receive reference clock signal, generate memory interface clock signal, and provide memory interface clock signal to memory interface; and power management unit (PMU), wherein first internal clock signal drives first IP, memory interface clock signal drives memory interface, PMU generates first control signal based on operational states of plurality of processors, and provides first control signal to internal clock circuit, PMU generates second control signal based on operational states of plurality of processors, and provides second control signal to memory interface clock circuit, internal clock circuit sets clock rate of first internal clock signal based on first control signal, and memory interface clock circuit sets clock rate of memory interface clock signal based on second control signal.

A thermal management scheme, for a multichip module, that is aware of various dies in a stack (horizontal and/or vertical) and heat generated from them, local hot spots in a victim die, and hot spots in aggressor die(s). Each victim die receives telemetry information from thermal sensors located in aggressor dies as well as local thermal sensors in the victim die. The telemetry information is used to enable a virtual sensing scheme where temperature for a target die (e.g., a victim die) and/or its intellectual property (IP) domain is estimated or calculated. The estimated or calculated temperature is then used for performance management of the victim and/or aggressor dies in the stack.

A system can include a plurality of sequencers each configured to provide a number of sequenced output signals responsive to assertion of a respective sequencer enable signal provided thereto. The system can include chaining circuitry coupled to the plurality of sequencers. The chaining circuitry can comprise logic to: responsive to assertion of a primary enable signal received thereby, assert respective sequencer enable signals provided to the plurality of sequencers in accordance with a first sequence; and responsive to deassertion of the primary enable signal, assert the respective sequencer enable signals provided to the plurality of sequencers in accordance with a second sequence.

A system can include a plurality of sequencers each configured to provide a number of sequenced output signals responsive to assertion of a respective sequencer enable signal provided thereto. The system can include chaining circuitry coupled to the plurality of sequencers. The chaining circuitry can comprise logic to: responsive to assertion of a primary enable signal received thereby, assert respective sequencer enable signals provided to the plurality of sequencers in accordance with a first sequence; and responsive to deassertion of the primary enable signal, assert the respective sequencer enable signals provided to the plurality of sequencers in accordance with a second sequence.

In some examples, a storage medium stores a plurality of information elements that relate to corresponding virtual trusted platform module (TPM) interfaces, where each respective information element of the plurality of information elements corresponds to a respective virtual machine (VM). A controller provides virtual TPMs for respective security operations. A processor resource executes the VMs to use the information elements to access the corresponding virtual TPM interfaces to invoke the security operations of the virtual TPMs, where a first VM is to access a first virtual TPM interface of the virtual TPM interfaces to request that a security operation of a respective virtual TPM be performed.

In some examples, a storage medium stores a plurality of information elements that relate to corresponding virtual trusted platform module (TPM) interfaces, where each respective information element of the plurality of information elements corresponds to a respective virtual machine (VM). A controller provides virtual TPMs for respective security operations. A processor resource executes the VMs to use the information elements to access the corresponding virtual TPM interfaces to invoke the security operations of the virtual TPMs, where a first VM is to access a first virtual TPM interface of the virtual TPM interfaces to request that a security operation of a respective virtual TPM be performed.

In an embodiment, a processor includes multiple processing engines and a power control unit. The power control unit is to receive a mapping of multiple virtual partitions to sets of the processing engines, and in response to a receipt of the mapping of multiple of virtual partitions: access a power limit table for the processor, and generate multiple virtual partition power limit tables based on the power limit table for the processor, where each virtual partition power limit table is associated with a different virtual partition. Other embodiments are described and claimed.