A voice wakeup method includes receiving a plurality of voice wakeup messages sent by a plurality of electronic devices, where each voice wakeup message includes a distance and a wakeup energy value; determining, based on distances and wakeup energy values in the plurality of voice wakeup messages from the plurality of electronic devices, whether energy attenuation of the wakeup word emitted by the sound source complies with an attenuation law of sound energy radiated by a point source; and when determining that the energy attenuation of the wakeup word emitted by the sound source does not comply with the attenuation law of the sound energy radiated by the point source, sending a wakeup forbidding instruction to the plurality of electronic devices.

A system includes a first power stage circuit having a first PWM input, a first voltage input and a first power output. The first power stage circuit is configured to provide a first current at the first power output responsive to a PWM signal at the first PWM input, and configured to receive a voltage at the first voltage input. The system includes a second power stage circuit having a second PWM input, a second voltage input and a second power output. The second voltage input is coupled to the first voltage input, and the second power stage circuit is configured to provide a second current at the second power output responsive to the PWM signal at the second PWM input. The second power stage circuit is configured to receive the voltage at the second voltage input, the voltage representing an average of the first current and the second current.

A system includes a first power stage circuit having a first PWM input, a first voltage input and a first power output. The first power stage circuit is configured to provide a first current at the first power output responsive to a PWM signal at the first PWM input, and configured to receive a voltage at the first voltage input. The system includes a second power stage circuit having a second PWM input, a second voltage input and a second power output. The second voltage input is coupled to the first voltage input, and the second power stage circuit is configured to provide a second current at the second power output responsive to the PWM signal at the second PWM input. The second power stage circuit is configured to receive the voltage at the second voltage input, the voltage representing an average of the first current and the second current.

Vehicles can employ onboard telematic monitoring devices to collect vehicle and operation data, such as for improved vehicle fleet management. Such telematic monitoring devices are dependent on power from a vehicle, such that data collection and communication can be interrupted if a telematic monitoring device is disconnected or has a poor connection. The present disclosure relates to battery devices, which provide power to telematic devices as needed in order to maintain data collection and communication, or other more limited functionality. The present disclosure also relates to systems including battery devices, and methods for operating battery devices.

Vehicles can employ onboard telematic monitoring devices to collect vehicle and operation data, such as for improved vehicle fleet management. Such telematic monitoring devices are dependent on power from a vehicle, such that data collection and communication can be interrupted if a telematic monitoring device is disconnected or has a poor connection. The present disclosure relates to battery devices, which provide power to telematic devices as needed in order to maintain data collection and communication, or other more limited functionality. The present disclosure also relates to systems including battery devices, and methods for operating battery devices.

The excitation of processing paths in a microelectronic circuit is organized by providing one or more pieces of input information to a decision-making software, and executing the decision-making software to decide, whether one or more of said processing paths of the microelectronic circuit are to be excited with test signals. Deciding that said processing paths are to be excited with said test signals results in proceeding to excite said one or more of said processing paths with said test signals and monitoring whether timing events occur on such one or more excited processing paths. A timing event is a change in a digital value at an input of a respective register circuit on an excited processing path, which change took place later than an allowable time limit defined by a triggering signal to said respective register circuit.

Managing runtime qubit allocation for executing quantum services is disclosed. In one example, a processor device of a quantum computing system implements a quantum backoff service (QBS) that enables safe runtime qubit allocation for executing quantum services. The QBS receives a request from a quantum service scheduler for allocation of one or more qubits for an executing quantum service. Upon receiving the request for allocation, the QBS determines whether the one or more qubits are unavailable for execution. If the QBS determines that the one or more qubits are unavailable for allocation, the QBS places the executing quantum service into a sleep state. The QBS in some examples may subsequently receive an indication that the one or more qubits have become available for allocation. The QBS then restores the executing quantum service into an executing state and allocates the one or more qubits for the executing quantum service.

A method includes obtaining a request for one of multiple operational modes from an application installed on an extended reality (XR) device or an XR runtime/renderer of the XR device. The method also includes selecting a first mode of the operational modes, based at least partly on a real-time system performance of the XR device. The method also includes publishing the selected first mode to the XR runtime/renderer or the application. The method also includes performing a task related to at least one of image rendering or computer vision calculations for the application, using an algorithm associated with the selected first mode.

In one embodiment, a system includes power management control that controls a duty cycle of a processor to manage power. The duty cycle may be the amount of time that the processor is powered on as a percentage of the total time. By frequently powering up and powering down the processor during a period of time, the power consumption of the processor may be controlled while providing the perception that the processor is continuously available. For example, the processor may be a graphics processing unit (GPU), and the period of time over which the duty cycle is managed may be a frame to be displayed on the display screen viewed by a user of the system.

Disclosed are systems, methods, and devices for communicating a source of a 10SPE wake. Such a communication may be performed over a low-pin count hardware interface of a 10SPE physical layer (PHY) module having a split arrangement. A controller side of a 10SPE PHY may perform a local or remote 10SPE wake forward in response to a communicated source of a wake. Also disclosed is a digital interface for operatively coupling a PHY controller to PHY transceiver over a low-pin count connection, where the digital interface includes circuitry for checking the integrity of circuitry of the digital interface.