Patent classifications
G06F5/12
Method and system for timeout monitoring
Embodiments relate to systems and methods for timeout monitoring of concurrent commands or parallel communication channels comprising assigning or de-assigning each one of the commands or communication channels to a corresponding one of a plurality of timeout timers when corresponding commands are to be transmitted or command acknowledges are received respectively.
Method and system for timeout monitoring
Embodiments relate to systems and methods for timeout monitoring of concurrent commands or parallel communication channels comprising assigning or de-assigning each one of the commands or communication channels to a corresponding one of a plurality of timeout timers when corresponding commands are to be transmitted or command acknowledges are received respectively.
Buffer manager and methods for managing memory
Some of the embodiments of the present disclosure provide a method comprising managing a plurality of buffer addresses in a system-on-chip (SOC); and if a number of available buffer addresses in the SOC falls below a low threshold value, obtaining one or more buffer addresses from a memory, which is external to the SOC, to the SOC. Other embodiments are also described and claimed.
Buffer manager and methods for managing memory
Some of the embodiments of the present disclosure provide a method comprising managing a plurality of buffer addresses in a system-on-chip (SOC); and if a number of available buffer addresses in the SOC falls below a low threshold value, obtaining one or more buffer addresses from a memory, which is external to the SOC, to the SOC. Other embodiments are also described and claimed.
Operating a FIFO memory
The present invention concerns a method of operating a first-in first-out memory (9) arranged to store measurement data samples measured by a plurality of data measurement sensors (1, 3, 5), which can operate at various sampling rates. The oldest measurement data sample in the memory (9) is arranged to be read first before the newer measurement data samples. The method comprises: receiving measurement data samples from at least two data measurement sensors (1, 3, 5); and saving the received measurement data samples in the memory (9). Each of the measurement data samples saved in the memory is associated with a tag which is also saved in the memory (9) and which identifies the data measurement sensor (1, 3, 5) which measured the respective measurement data sample.
System and method for managing multi-core accesses to shared ports
A port is provided that utilized various techniques to manage contention for the same by controlling data that is written to and read from the port in multi-core assembly within a usable computing system. When the port is a sampling port, the assembly may include at least two cores, a plurality of buffers in operative communication with the at least one sampling ports, a non-blocking contention management unit comprising a plurality of pointers that collectively operate to manage contention of shared ports in a multi-core computing system. When the port is queuing port, the assembly may include buffers in communication with the queuing port and the buffers are configured to hold multiple messages in the queuing port. The assembly may manage contention of shared queuing ports in a multi-core computing system.
System and method for managing multi-core accesses to shared ports
A port is provided that utilized various techniques to manage contention for the same by controlling data that is written to and read from the port in multi-core assembly within a usable computing system. When the port is a sampling port, the assembly may include at least two cores, a plurality of buffers in operative communication with the at least one sampling ports, a non-blocking contention management unit comprising a plurality of pointers that collectively operate to manage contention of shared ports in a multi-core computing system. When the port is queuing port, the assembly may include buffers in communication with the queuing port and the buffers are configured to hold multiple messages in the queuing port. The assembly may manage contention of shared queuing ports in a multi-core computing system.
SEMICONDUCTOR DEVICE
A semiconductor device including a FIFO circuit in which a data capacity can be increased while minimizing an increase in a circuit scale is provided. The semiconductor device includes a single-port type storage unit (11) which stores data, a flip-flop (12) which temporarily stores write data (FIFO input) or read data (FIFO output) of the storage unit (11), and a control unit (14, 40) which controls a write timing of a data signal, which is stored in the flip-flop (12), to the storage unit (11) or a read timing of the data signal from the storage unit to avoid an overlap between a write operation and a read operation in the storage unit (11).
INFORMATION PROCESSING DEVICE AND NON-TRANSITORY COMPUTER-READABLE STORAGE MEDIUM FOR STORING RECEPTION PROCESSING PROGRAM
An information processing device is configured to perform processing, the processing including: executing a persistence processing configured to make a part of a region persistent, the region being to be used as a ring buffer in remote direct memory access (RDMA) to a non-volatile memory accessible in an equal manner to a dynamic random access memory (DRAM) so as not to allow received data stored in the part of the region to be overwritten; executing a determination processing configured to determine whether a ratio of the region made persistent by the persistence processing has exceeded a first threshold; and executing a selection processing configured to select a method of evacuating the persistent received data by using a received data amount of the information processing device and a free region in the non-volatile memory in a case where the determination processing determines that the ratio has exceeded the first threshold.
INFORMATION PROCESSING DEVICE AND NON-TRANSITORY COMPUTER-READABLE STORAGE MEDIUM FOR STORING RECEPTION PROCESSING PROGRAM
An information processing device is configured to perform processing, the processing including: executing a persistence processing configured to make a part of a region persistent, the region being to be used as a ring buffer in remote direct memory access (RDMA) to a non-volatile memory accessible in an equal manner to a dynamic random access memory (DRAM) so as not to allow received data stored in the part of the region to be overwritten; executing a determination processing configured to determine whether a ratio of the region made persistent by the persistence processing has exceeded a first threshold; and executing a selection processing configured to select a method of evacuating the persistent received data by using a received data amount of the information processing device and a free region in the non-volatile memory in a case where the determination processing determines that the ratio has exceeded the first threshold.