Patent classifications
G06F7/16
Method for providing intelligent service, intelligent service system and intelligent terminal based on artificial intelligence
A method for providing an intelligent service, an intelligent service system and an intelligent terminal based on artificial intelligence. The method comprises: receiving a first service request from a user (102); determining a search term and the weight thereof for the first service request (104); providing a first service result according to the search term and the weight thereof (106); and collecting feedback information for the first service result from the user, and adjusting, in real time, the search term and/or the weight thereof for the first service request, according to evaluation information in the feedback information (108).
Method for providing intelligent service, intelligent service system and intelligent terminal based on artificial intelligence
A method for providing an intelligent service, an intelligent service system and an intelligent terminal based on artificial intelligence. The method comprises: receiving a first service request from a user (102); determining a search term and the weight thereof for the first service request (104); providing a first service result according to the search term and the weight thereof (106); and collecting feedback information for the first service result from the user, and adjusting, in real time, the search term and/or the weight thereof for the first service request, according to evaluation information in the feedback information (108).
Method/system for managing experimental data, computer readable storage medium, and device
A method/system for managing experimental data, a computer readable storage medium, and a device are provided. The method includes: recording the managing experimental data, and preprocessing the experimental data, to obtain at least two preprocessed experimental arrays; selecting one element from each of two selected preprocessed experimental arrays according to an analysis requirement, and combining the elements to form a cyclic experimental database, the cyclic experimental database including several combination data; performing cyclic statistical analysis on the combination data in the cyclic experimental database, to obtain a cyclic statistical result corresponding to retrieved combination data.
Method/system for managing experimental data, computer readable storage medium, and device
A method/system for managing experimental data, a computer readable storage medium, and a device are provided. The method includes: recording the managing experimental data, and preprocessing the experimental data, to obtain at least two preprocessed experimental arrays; selecting one element from each of two selected preprocessed experimental arrays according to an analysis requirement, and combining the elements to form a cyclic experimental database, the cyclic experimental database including several combination data; performing cyclic statistical analysis on the combination data in the cyclic experimental database, to obtain a cyclic statistical result corresponding to retrieved combination data.
ELECTRONIC APPARATUS AND METHOD FOR REDUCING NUMBER OF COMMANDS
An electronic apparatus and a method for reducing the number of commands are provided. The electronic apparatus includes a central processor and a co-processor. The central processor generates a plurality of original register setting commands to set at least one bit of at least one register of the co-processor. The original register setting commands include a plurality of first original register setting commands, and a plurality of setting targets of the first original register setting commands have address continuity. The central processor merges the first original register setting commands to generate at least one merged register setting command. The central processor transmits the at least one merged register setting command to the co-processor.
Accelerator controller for inserting template microcode instructions into a microcode buffer to accelerate matrix operations
A method for a controller to execute a program comprising a sequence of functions on an accelerator with a pipelined architecture comprising a microcode buffer. The method comprises executing a function of the program as a sequence of operations, wherein the sequence of operations is represented by a sequence of templates, determining whether the template is non-colliding with previously inserted templates in the microcode buffer, determining whether data in local memory will be referenced before all previously inserted templates have taken effect, determining whether registers will be referenced before all previously inserted templates in the microcode buffer have taken effect, when it is determined that the template fits, that resources are available, that local data memory accesses will not collide, and that register accesses will not collide: creating a sequence of microcode instructions in the template, and inserting the template into the microcode buffer.
Accelerator controller for inserting template microcode instructions into a microcode buffer to accelerate matrix operations
A method for a controller to execute a program comprising a sequence of functions on an accelerator with a pipelined architecture comprising a microcode buffer. The method comprises executing a function of the program as a sequence of operations, wherein the sequence of operations is represented by a sequence of templates, determining whether the template is non-colliding with previously inserted templates in the microcode buffer, determining whether data in local memory will be referenced before all previously inserted templates have taken effect, determining whether registers will be referenced before all previously inserted templates in the microcode buffer have taken effect, when it is determined that the template fits, that resources are available, that local data memory accesses will not collide, and that register accesses will not collide: creating a sequence of microcode instructions in the template, and inserting the template into the microcode buffer.
ELECTRONIC APPARATUS AND METHOD FOR REDUCING NUMBER OF COMMANDS
An electronic apparatus and a method for reducing the number of commands are provided. The electronic apparatus includes a central processor and a co-processor. The central processor generates a plurality of original register setting commands to set at least one bit of at least one register of the co-processor. The original register setting commands include a plurality of first original register setting commands, and a plurality of setting targets of the first original register setting commands have address continuity. The central processor merges the first original register setting commands to generate at least one merged register setting command. The central processor transmits the at least one merged register setting command to the co-processor.
ELECTRONIC APPARATUS AND METHOD FOR REDUCING NUMBER OF COMMANDS
An electronic apparatus and a method for reducing the number of commands are provided. The electronic apparatus includes a central processor and a co-processor. The central processor generates a plurality of original register setting commands to set at least one bit of at least one register of the co-processor. The original register setting commands include a plurality of first original register setting commands, and a plurality of setting targets of the first original register setting commands have address continuity. The central processor merges the first original register setting commands to generate at least one merged register setting command. The central processor transmits the at least one merged register setting command to the co-processor.
VECTORIZED SORTED-SET INTERSECTION USING CONFLICT-DETECTION SIMD INSTRUCTIONS
Vectorized sorted-set intersection is performed using conflict-detection single instruction, multiple data (SIMD) instructions. A first ordered subset of values of a first ordered set of distinct values and a second ordered subset of values of a second ordered set of distinct values is loaded into a register. A first value in the register that matches another value in the register (i.e., common values) is identified by performing an SIMD instruction. The first value is then stored in a result set representing a merge-sort result set between the first ordered set of distinct values and the second ordered set of distinct values.