G06F7/491

DECIMAL FLOATING-POINT ROUND-FOR-REROUND INSTRUCTION
20230342112 · 2023-10-26 ·

A decimal floating-point instruction is executed in a round-for-reround mode. The decimal floating-point instruction is configured to perform a decimal floating-point operation on a decimal floating-point operand. The executing includes forming based on performing the decimal floating-point operation, an intermediate result having a high order portion and a low order portion. The high order portion has a least significant digit. A rounded-for-reround number is created from the intermediate result. The rounded-for-reround number includes the high order portion of the intermediate result and based on the least significant coefficient digit of the high order portion being a selected value and based on the low order portion having another selected value, the least significant digit of the rounded-for-reround number is incremented. The rounded-for-reround number is stored.

MULTI-PARTY COMPUTATION (MPC) BASED KEY SEARCH IN PRIVATE DATA

Disclosed herein are methods and systems for efficiently retrieving data from an at least partially encrypted table based record using secure Multi-Party Computation (MPC). A query received to retrieve data from a table based record comprising data items arranged in rows and columns may include a queried data item (key) which potentially matches one or more encrypted data items contained in one or more of the columns. The computing nodes, each having a respective one of a plurality of shares of a one-hot representation of each of the encrypted data items engage in the MPC session to match between a one-hot representation of the queried data item and the one-hot representation of each encrypted data item and output each matching row. The match is based on multiplying, in each encrypted data item's one-hot representation, only bits identified as hot in the queried data item's one-hot representation.

Digit validation check control in instruction execution

Digit validation check control for execution of an instruction. A process obtains an instruction to perform operation(s) using input value(s). The instruction includes a no validation indicator for controlling whether digit validation check control is enabled for execution of the instruction. The process executes the instruction, including determining, based on the no validation indicator, whether digit validation check control is enabled for execution of the instruction, and performing processing based on the determining. Based on the no validation indicator being set to a defined value, digit validation check control is enabled and the processing includes forcing a digit check error indicator output by the executing to indicate no digit check error with respect to the at least one input value.

Decimal load immediate instruction

An instruction generates a value for use in processing within a computing environment. The instruction obtains a sign control associated with the instruction, and shifts an input value of the instruction in a specified direction by a selected amount to provide a result. The result is placed in a first designated location in a register, and the sign, which is based on the sign control, is placed in a second designated location of the register. The result and the sign provide a signed value to be used in processing within the computing environment.

IN-MEMORY BIT-SERIAL ADDITION SYSTEM

An in-memory vector addition method for a dynamic random access memory (DRAM) is disclosed which includes consecutively transposing two numbers across a plurality of rows of the DRAM, each number transposed across a fixed number of rows associated with a corresponding number of bits, assigning a scratch-pad including two consecutive bits for each bit of each number being added, two consecutive bits for carry-in (C.sub.in), and two consecutive bits for carry-out-bar (C.sub.out), assigning a plurality of bits in a transposed orientation to hold results as a sum of the two numbers, for each bit position of the two numbers: computing the associated sum of the bit position; and placing the computed sum in the associated bit of the sum.

DATA COMPUTING SYSTEM
20210055879 · 2021-02-25 ·

The present disclosure provides a data computing system. The data computing system comprises: a memory, a processor and an accelerator, wherein the memory is communicatively coupled to the processor and configured to store data to be computed and a computed result, the data being written by the processor; the processor is communicatively coupled to the accelerator and configured to control the accelerator; and the accelerator is communicatively coupled to the memory and configured to access the memory according to pre-configured control information, implement a computing process to produce the computed result and write the computed result back to the memory. The present disclosure also provides an accelerator and a method performed by an accelerator of a data computing system. The present disclosure can improve the execution efficiency of the processor and reduce the computing overhead of the processor.

METHOD, APPARATUS, AND COMPUTER PROGRAM STORED IN COMPUTER READABLE MEDIUM FOR CONDUCTING ARITHMETIC OPERATION EFFICIENTLY IN DATABASE MANAGEMENT SERVER
20210081384 · 2021-03-18 ·

Provided are a method, an apparatus, and a computer program stored in a computer readable medium for conducting an arithmetic operation efficiently in a database management server. In a computer-readable medium including a computer program including encoded commands, which is configured to cause one or more processors to perform operations when the computer program is executed by the one or more processors of a computer system, the operations include: an operation of receiving a structure body creation request for performing a predetermined arithmetic operation; an operation of creating a structure body in response to the structure body creation request; an operation of receiving an arithmetic operation processing request of requesting processing of the predetermined arithmetic operation with respect to a plurality of numerical values; an operation of creating structure body number data for each of the plurality of numerical values by applying each of the plurality of numerical values to the created structure body, the created structure body including one or more array elements and at least some numerical values being allocated to the one or more array elements to create the structure body number data; and an operation of performing the predetermined arithmetic operation based on the structure body number data for each of the plurality of numerical values.

METHOD, APPARATUS, AND COMPUTER PROGRAM STORED IN COMPUTER READABLE MEDIUM FOR CONDUCTING ARITHMETIC OPERATION EFFICIENTLY IN DATABASE MANAGEMENT SERVER
20210081384 · 2021-03-18 ·

Provided are a method, an apparatus, and a computer program stored in a computer readable medium for conducting an arithmetic operation efficiently in a database management server. In a computer-readable medium including a computer program including encoded commands, which is configured to cause one or more processors to perform operations when the computer program is executed by the one or more processors of a computer system, the operations include: an operation of receiving a structure body creation request for performing a predetermined arithmetic operation; an operation of creating a structure body in response to the structure body creation request; an operation of receiving an arithmetic operation processing request of requesting processing of the predetermined arithmetic operation with respect to a plurality of numerical values; an operation of creating structure body number data for each of the plurality of numerical values by applying each of the plurality of numerical values to the created structure body, the created structure body including one or more array elements and at least some numerical values being allocated to the one or more array elements to create the structure body number data; and an operation of performing the predetermined arithmetic operation based on the structure body number data for each of the plurality of numerical values.

Differential privacy security for benchmarking
11853461 · 2023-12-26 · ·

A system for determining a calculation utilizing differential privacy including an interface and a processor. The interface is configured to receive a request to determine result data of a calculation using multitenanted data. The multitenanted data comprises tenant data associated with a plurality of tenants. The processor is configured to: determine the result data by performing the calculation on the multitenanted data; determine whether a deterministic modification is needed to ensure privacy based at least in part on whether a number of participants in the result data is less than a threshold; and in response to determining that the deterministic modification is needed to ensure privacy: determine the deterministic modification; numerically modify the result data using the deterministic modification to determine modified result data; and provide the modified result data.

PREPARE FOR SHORTER PRECISION (ROUND FOR REROUND) MODE IN A DECIMAL FLOATING-POINT INSTRUCTION
20210004206 · 2021-01-07 ·

An instruction is executed in round-for-reround mode wherein the permissible resultant value that is closest to and no greater in magnitude than the infinitely precise result is selected. If the selected value is not exact and the units digit of the selected value is either 0 or 5, then the digit is incremented by one and the selected value is delivered. In all other cases, the selected value is delivered.