A method and decompression unit for performing decompression to determine image element values from compressed data representing a block of image element values each comprising one or more data values relating to a respective one or more channels. An indication of an origin value for each of the channels is read from the compressed data. For each of the channels, an indication of a first number of bits for representing difference values between the data values and the origin value for the channel is read from the compressed data. For each of the one or more channels, a second number of bits is obtained, wherein representations of the difference values for each of the channels are included in the compressed data using the second number of bits for that channel. The obtained second numbers of bits for the respective channels are used to read the representations of the difference values for the image element values being decompressed from the compressed data. Based on the representations of the difference values read from the compressed data, for each of the channels and for each of the image element values being decompressed, a difference value is determined in accordance with the first number of bits for the channel. For each of the one or more channels, the data value relating to the channel for each of the image element values being decompressed is determined using: (i) the origin value for the channel, and (ii) the determined difference value for the channel for the image element value.

Disclosed are apparatuses, systems, and techniques to perform and facilitate fast and efficient modular computational operations, such as modular division and modular inversion, using shared platforms, including hardware accelerator engines.

When an absolute value of a difference value between a first share and a second share which are secret-shared is less than or equal to a natural number t, the information processing apparatus calculates the difference value between the first share and the second share. Furthermore, the information processing apparatus performs a comparison in magnitude of the first share and the second share using bit-decomposition from a least significant bit to an m-th bit (m being a natural number) of the difference value.

Methods and decompression units for decompressing data from a compressed block of image data, the compressed block of image data representing a block of image data comprising a plurality of image element values, the image element values being divisible into at least a first value and a second value such that the block of image data comprises a two-dimensional block of first values. The method comprises: analysing a header of the compressed block of image data to identify (i) a location in a body of the compressed block of image data of a fixed-length parameter that corresponds to a first desired value in the two-dimensional block of first values, and (ii) common base information for the first desired value, the common base information being common to a first set of values comprising all of the two-dimensional block of first values or a portion of the two-dimensional block of first values that includes the first desired value; retrieving the fixed-length parameter that corresponds to the first desired value from the identified location in the body of the compressed block of image data; and generating the first desired value from the common base information and the fixed-length parameter.

A binary logic circuit for determining the ratio x/d where x is a variable integer input, the binary logic circuit comprising: a logarithmic tree of modulo units each configured to calculate x[a:b]mod d for respective block positions a and b in x where b > a with the numbering of block positions increasing from the most significant bit of x up to the least significant bit of x, the modulo units being arranged such that a subset of M - 1 modulo units of the logarithmic tree provide x[0: m]mod d for all m ∈ {1, M}, and, on the basis that any given modulo unit introduces a delay of 1: all of the modulo units are arranged in the logarithmic tree within a delay envelope of log.sub.2 M; and more than M - 2.sup.u of the subset of modulo units are arranged at the maximal delay of log.sub.2 M, where 2.sup.u is the power of 2 immediately smaller than M.

A circuit and corresponding method map memory addresses onto cache locations within set-associative (SA) caches of various cache sizes. The circuit comprises a modulo-arithmetic circuit that performs a plurality of modulo operations on an input memory address and produces a plurality of modulus results based on the plurality of modulo operations performed. The plurality of modulo operations performed are based on a cache size associated with an SA cache. The circuit further comprises a multiplexer circuit and an output circuit. The multiplexer circuit outputs selected modulus results by selecting modulus results from among the plurality of modulus results produced. The selecting is based on the cache size. The output circuit outputs a cache location within the SA cache based on the selected modulus results and the cache size. Such mapping of the input memory address onto the cache location is performed at a lower cost relative to a general-purpose divider.

Methods and decompression units for decompressing data from a compressed block of image data, the compressed block of image data representing a block of image data comprising a plurality of image element values, the image element values being divisible into at least a first value and a second value such that the block of image data comprises a two-dimensional block of first values. The method comprises: analysing a header of the compressed block of image data to identify (i) a location in a body of the compressed block of image data of a fixed-length parameter that corresponds to a first desired value in the two-dimensional block of first values, and (ii) common base information for the first desired value, the common base information being common to a first set of values comprising all of the two-dimensional block of first values or a portion of the two-dimensional block of first values that includes the first desired value; retrieving the fixed-length parameter that corresponds to the first desired value from the identified location in the body of the compressed block of image data; and generating the first desired value from the common base information and the fixed-length parameter.

Methods and compression units for compressing a block of image data, the block of image data comprising a plurality of image element values, the image element values being divisible into at least a first value and a second value such that the block of image data comprises a two-dimensional block of first values, the method comprising: compressing a first data set comprising all or a portion of the two-dimensional block of first values in accordance with a first fixed-length compression algorithm to generate a first compressed block by: identifying common base information for the first data set; and identifying a fixed-length parameter for each first value in the first data set, the fixed-length parameter being zero, one or more than one bits in length; and forming a compressed block for the block of image data based on the first compressed block.

(k,n)-secret-sharing share [[a]].sup.p is converted into (k,k)-additive-secret-sharing share <a>.sup.p, each bit of a′.sub.0 is (k,n)-secret-sharing to obtain a share [[a′.sub.0]].sup.2{circumflex over ( )}|p|; each bit of the share <a>.sup.p.sub.1 is (k,n)-secret-shared to obtain a share [[a]].sup.2{circumflex over ( )}|p|; a bit representation share [[a′.sub.0+a.sub.1]].sup.2{circumflex over ( )}(|p|+1) of a′.sub.0+a.sub.1 is obtained; it is assumed that the most significant bit of the share [[a′.sub.0+a.sub.1]].sup.2{circumflex over ( )}(|p|+1) is a share [[q]].sup.2, a share [[q]].sup.Q is obtained from the share [[q]].sup.2; <a>.sup.p.sub.0 mod Q, <a>.sup.p.sub.1 mod Q are obtained from <a′>.sup.p.sub.0, <a>.sup.p.sub.1 and are set as a share <a′>.sup.Q; the share <a′>.sup.Q is converted in (k,n)-secret-sharing to obtain (k,n)-secret-sharing share [[a′]].sup.Q; [[a]].sup.Q is calculated from the share [[a]].sup.Q and the share [[q]].sup.Q.

There is provided a method and an apparatus for calculating an output modulo k value of an input data value. The apparatus is provided with input data value analysis circuitry to consider the input data value as a plurality of partial operands, and to determine a plurality of modulo k values corresponding to the plurality of partial operands. The apparatus is provided with modulo k calculation circuitry comprising plural combination stages to replace one or more groups of input modulo k values with one or more combined modulo k values. The plural combination stages comprise a first combination stage to receive the plurality of modulo k values as inputs and to output an intermediate reduced plurality of modulo k values, and one or more further combination stages to sequentially combine one or more groups of the intermediate reduced plurality of modulo k values to generate the output modulo k value.