Patent classifications
G06F8/45
Automatic Workflow Generation
Automatic workflow generation is described. One or more files containing code statements for accessing and modifying information in a destination database is received. The code statements are parsed from the one or more files and dependencies between the code statements are determined. A dependency graph is built by arranging the code statements according to the dependencies between the code statements. The dependency graph is partitioned by identifying at least one barrier code statement having an unclear dependency and dividing the dependency graph between code statements occurring prior to the at least one barrier code statement and code statements occurring after the at least one barrier code statement. Jobs are scheduled based on the partitioned dependency graph, and the code statements are annotated according to the scheduled jobs. A workflow is then automatically generated based on the annotated code statements.
STATIC BLOCK FREQUENCY PREDICTION IN IRREDUCIBLE LOOPS WITHIN COMPUTER CODE
A block frequency of a block in an irreducible loop in computer code is statically determined. The statically determining includes splitting an incoming block mass among multiple loop headers of the irreducible loop to provide an initial mass for the block. A bottom-up traversal and a top-down traversal of a plurality of loops of the computer code including the irreducible loop are iteratively performed to update a mass of the block. The iteratively performing commences with propagating the initial mass of the block to one or more blocks of one or more loops of the plurality of loops and continues with propagating and updating masses of select blocks of the plurality of loops until a predefined point is reached providing a resulting mass for the block. The block frequency of the block is determined using the resulting mass and is to be used in processing associated with the computer code.
PROGRAM CONVERSION METHOD USING COMMENT-BASED PSEUDO-CODES AND COMPUTERREADABLE RECORDING MEDIUM, ONTO WHICH PROGRAM IS RECORDED, FOR IMPLEMENTING
The present invention relates to a program conversion method using comment-based pseudo-codes and a computer-readable recording medium, onto which a program is recorded, for implementing the method, and the method by which a computer system converts a program by using comment-based pseudo-codes comprises the steps of: analyzing codes written in a universal programming language so as to confirm pseudo-codes expressed in comments; generating codes, written in a parallel programming language, by converting codes, if the codes belong to a pseudo-code area, into structure members by using the parallel programming language formed to be executed on one or more data parallel compute nodes, or by converting the same into kernel functions, and by converting codes, if the codes belong to the remaining areas, into host codes of the parallel programming language; and simultaneously executing the kernel functions of the generated codes by using the data parallel compute nodes.
DATAFLOW GRAPH PROGRAMMING ENVIRONMENT FOR A HETEROGENOUS PROCESSING SYSTEM
Examples herein describe techniques for generating dataflow graphs using source code for defining kernels and communication links between those kernels. In one embodiment, the graph is formed using nodes (e.g., kernels) which are communicatively coupled by edges (e.g., the communication links between the kernels). A compiler converts the source code into a bit stream and/or binary code which configure a heterogeneous processing system of a SoC to execute the graph. The compiler uses the graph expressed in source code to determine where to assign the kernels in the heterogeneous processing system. Further, the compiler can select the specific communication techniques to establish the communication links between the kernels and whether synchronization should be used in a communication link. Thus, the programmer can express the dataflow graph at a high-level (using source code) without understanding about how the operator graph is implemented using the heterogeneous hardware in the SoC.
Method and system for splitting scheduling problems into sub-problems
A computing system receives user input of scheduling problem data. The scheduling problem data relates to a scheduling problem and includes one or more stations and tasks to be performed by at least one station. The computing system constructs a graph problem using the scheduling problem data. The graph problem includes a graph. The computing system cuts the graph into sub-graphs using a cut algorithm to create a cut result that satisfies a threshold and identifies one or more task exceptions from the sub-graphs in the cut result. The one or more task exceptions are tasks that can be assigned to more than one sub-graph. The computing system creates scheduling sub-problems pertaining to the one or more task exceptions using the cut result.
INFORMATION PROCESSING APPARATUS AND CONVERSION METHOD
An information processing apparatus sets, in a second program: a second array where an occurrence pattern indicating whether elements are subjected to computation is a repetition of a pattern for every power-of-two number of elements; a second mask array generated by adding masks indicating that corresponding elements are not subjected to the computation to a first mask array so that the second mask array includes as many masks as the number of elements included in a second pattern; and a second instruction string providing an instruction for the computation of elements corresponding to masks indicating that corresponding elements are subjected to the computation, among the elements set in the second array. Each mask in the second mask array to be applied to an element in the second array is specified by a bitwise logical AND using a value indicating the position of the element in the second array.
METHOD OF REORDERING CONDITION CHECKS
Described is a computer-implemented method of reordering condition checks. Two or more condition checks in computer code that may be reordered within the code are identified. It is determined that the execution frequency of a later one of the condition checks is satisfied at a greater frequency than a preceding one of the condition checks. It is determined that there is an absence of side effects in the two or more condition checks. The values of the condition checks are propagated and abstract interpretation is performed on the values that are propagated. It is determined that the condition checks are exclusive of each other, and the condition checks are reordered within the computer code.
Multi-version shaders
Described herein are techniques for generating a stitched shader program. The techniques include identifying a set of shader programs to include in the stitched shader program, wherein the set includes at least one multiversion shader program that includes a first version of instructions and a second version of instructions, wherein the first version of instructions uses a first number of resources that is different than a second number of resources used by the second version of instructions. The techniques also include combining the set of shader programs to form the stitched shader program. The techniques further include determining a number of resources for the stitched shader program. The techniques also include based on the determined number of resources, modifying the instructions corresponding to the multiversion shader program to, when executed, execute either the first version of instructions, or the second version of instructions.
Information processing device and method for assigning task
A computer calculates memory access rates for respective tasks on basis of hardware monitor information obtained by monitoring operating states of hardware during execution of an application program. The tasks correspond to respective syntax units specified in the application program. The computer assigns, on basis of the calculated memory access rates, a first task to a socket in a processor in response to an instruction for executing the first task.
System and Method for Creating Concurrent Programming Languages by Extending Existing Programming Languages
A system and method for creating a concurrent programming language by extending existing programming languages. The system and method may be useful for extending known concurrent programming languages, such as Java and C#. The system and method provides a compilation process that aids concurrent programming that aids concurrent programming by extending existing programming languages. The extended languages will support signals, concurrent objects, and concurrent expressions. The system and method does not use contracts or futures, but rather uses a different type of object that is understood with a different type of concurrent expression. In one embodiment, an asynchronous object is used.