The subject disclosure relates to techniques for updating a bootloader on a embedded device. In some aspects, a process of the disclosed technology can include steps for calculating a digest for an existing bootloader stored on the bootloader memory, determining if the digest for the existing bootloader matches a digest for a target bootloader, and copying the target bootloader to the bootloader memory, if the digest for the existing bootloader does not match the digest for the target bootloader. Systems and computer-readable media are also provided.

A firmware upgrade method can be applied to a terminal, and include: receiving a broadcast message for broadcasting an updated firmware type sent by a cloud server; sending firmware information matching the firmware type to the cloud server; and receiving a firmware upgrade package corresponding to the firmware information pushed by the cloud server. As a result, the space of the storage medium of the terminal is effectively saved, and the efficiency of firmware upgrade is improved.

A firmware upgrade method can be applied to a terminal, and include: receiving a broadcast message for broadcasting an updated firmware type sent by a cloud server; sending firmware information matching the firmware type to the cloud server; and receiving a firmware upgrade package corresponding to the firmware information pushed by the cloud server. As a result, the space of the storage medium of the terminal is effectively saved, and the efficiency of firmware upgrade is improved.

A device can (i) operate a primary platform (PP) within a tamper resistant element (TRE) and (ii) receive encrypted firmware images for operating within the primary platform. The TRE can store in nonvolatile memory of the TRE (i) a PP static private key (SK-static.PP), (ii) a server public key (PK.IDS1), and (iii) a set of cryptographic parameters. The TRE can generate a one-time PKI key pair of SK-OT1.PP and PK-OT1.PP and send the public key PK-OT1.PP to a server. The TRE can receive a one-time public key from the server comprising PK-OT1.IDS1. The TRE can derive a ciphering key using an elliptic curve Diffie Hellman key exchange and the SK-static.PP, SK-OT1.PP, PK.IDS1, and PK-OT1.IDS1 keys. The TRE can decrypt the encrypted firmware using the derived ciphering key. The primary platform can comprise a smart secure platform (SSP) and the decrypted firmware can comprise a virtualized image for the primary platform.

A computing device includes a hardware switch that is activated when a primary Basic Input/Output System (BIOS) of a first BIOS chip of the device fails to load an Operating System (OS) image from an OS partition of a hard drive. The switch passes control to a backup BIOS that executes from a backup BIOS chip. The backup BIOS loads a recovery image from BIOS recovery partition of the hard drive, which causes a reflash application to execute from the recovery image. Reflash application obtains a recovery BIOS from the BIOS recovery partition of the hard drive, reflashes/writes the recovery BIOS onto the first BIOS chip and reboots the device. Following reboot of the device, recovery BIOS loads the OS image from the OS partition, and recovery BIOS becomes the primary BIOS on the first BIOS chip of the device.

This disclosure provides for improvements in managing multi-drive, multi-die or multi-plane NAND flash memory. In one embodiment, the host directly assigns physical addresses and performs logical-to-physical address translation in a manner that reduces or eliminates the need for a memory controller to handle these functions, and initiates functions such as wear leveling in a manner that avoids competition with host data accesses. A memory controller optionally educates the host on array composition, capabilities and addressing restrictions. Host software can therefore interleave write and read requests across dies in a manner unencumbered by memory controller address translation. For multi-plane designs, the host writes related data in a manner consistent with multi-plane device addressing limitations. The host is therefore able to “plan ahead” in a manner supporting host issuance of true multi-plane read commands.

This disclosure provides for improvements in managing multi-drive, multi-die or multi-plane NAND flash memory. In one embodiment, the host directly assigns physical addresses and performs logical-to-physical address translation in a manner that reduces or eliminates the need for a memory controller to handle these functions, and initiates functions such as wear leveling in a manner that avoids competition with host data accesses. A memory controller optionally educates the host on array composition, capabilities and addressing restrictions. Host software can therefore interleave write and read requests across dies in a manner unencumbered by memory controller address translation. For multi-plane designs, the host writes related data in a manner consistent with multi-plane device addressing limitations. The host is therefore able to “plan ahead” in a manner supporting host issuance of true multi-plane read commands.

Disclosed embodiments relate to adjusting vehicle Electronic Control Unit (ECU) software versions. Operations may include receiving a prompt to adjust an ECU of a vehicle from executing a first version of ECU software to a second version of ECU software; configuring, in response to the prompt and based on a delta file corresponding to the second version of ECU software, the second version of ECU software on the ECU in the vehicle for execution; and configuring, in response to the prompt, the first version of ECU software on the ECU in the vehicle to become non-executable.

Disclosed embodiments relate to adjusting vehicle Electronic Control Unit (ECU) software versions. Operations may include receiving a prompt to adjust an ECU of a vehicle from executing a first version of ECU software to a second version of ECU software; configuring, in response to the prompt and based on a delta file corresponding to the second version of ECU software, the second version of ECU software on the ECU in the vehicle for execution; and configuring, in response to the prompt, the first version of ECU software on the ECU in the vehicle to become non-executable.

A method and apparatus for processing an audio processing chip, and an electronic device are provided. A specific implementation of the method includes: controlling the audio processing chip to perform firmware updating, the firmware updating including: updating second firmware stored in a second storage area of the audio processing chip to target firmware, or storing the target firmware to an empty second storage area in the audio processing chip; in response to an abnormality being not present in the firmware updating, determining the target firmware as firmware to be run in the audio processing chip; and in response to an abnormality being present in the firmware updating, determining the first firmware as the firmware to be run in the audio processing chip.