A device, and a method and a system for editing command sets applied to the device are provided. The system includes an editor installed in a computer device for initiating an editing interface used to edit one or more command sets applied to the device and a writer used to convert the command sets into profiles with a format specified to the device. The command sets are used to form the profiles configured to be written to the device via the writer. The command sets including a set of scripts of commands and input codes specified to the device can be edited through the editor. The device is a computer mouse with multiple keys. The keys can be used to switch the profiles stored in the device, and the command set of the profile being activated is applied to the device for operating the device.

An engine control device for controlling an engine of a vehicle includes a microcomputer for executing an engine control process, and an abnormality detection unit for detecting an abnormality of the microcomputer. A reset execution unit executes a process of causing an external monitor IC to reset the microcomputer on condition that the abnormality of the microcomputer is detected and an engine rotation speed is higher than a threshold engine speed value. The microcomputer may alternatively be reset on condition that a vehicle speed is higher than a threshold vehicle speed value, or that all or a part of torque output from the engine is able to be supplemented by another vehicle drive power source.

An electronic device may include a semiconductor memory structured to include a plurality of memory cells, wherein each of the plurality of memory cells may comprise: a first electrode layer; a second electrode layer; and a selection element layer disposed between the first electrode layer and the second electrode layer to electrically couple or decouple an electrical connection between the first electrode layer and the second electrode layer based on a magnitude of an applied voltage or an applied current with respect to a threshold magnitude, wherein the selection element layer has a dopant concentration profile which decreases from an interface between the selection element layer and the first electrode layer toward an interface between the selection element layer and the second electrode layer.

Systems, apparatuses, and methods related to extended memory microcode components for performing extended memory operations are described. An example apparatus can include a plurality of computing devices. Each of the computing devices can include a processing unit and a memory array. The example apparatus can include a plurality of microcode components coupled to each of the plurality of computing devices and each comprise a set of microcode instructions. The example apparatus can further include a communication subsystem coupled to a host and to each of the plurality of computing devices. Each of the plurality of computing devices can be configured to receive a request from the host, retrieve at least one of the set of microcode instructions, transfer a command and the at least one of the set of microcode instructions, and receive a result of performing the operation.

Systems, methods, and apparatuses relating to circuitry to implement out-of-order access to a shared microcode sequencer by a clustered decode pipeline are described. In one embodiment, a hardware processor core includes a first decode cluster comprising a plurality of decoder circuits, a second decode cluster comprising a plurality of decoder circuits, a fetch circuit to fetch a first block of instructions and send the first block of instructions to the first decode cluster for decoding, and fetch a second block of instructions younger in program order than the first block of instructions and send the second block of instructions to the second decode cluster for decoding, a microcode sequencer comprising a memory that stores a plurality of micro-operations, and an arbitration circuit to arbitrate access by the first decode cluster and the second decode cluster to a shared read port of the memory, wherein the arbitration circuit is to allow the second decode cluster decoding the second block of instructions access to the shared read port of the memory instead of the first decode cluster decoding the first block of instructions when an instruction of the second block of instructions has a number of corresponding micro-operations in the microcode sequencer below an arbitration threshold.

The present invention extends configuring development and operations pipelines. A pipeline manager can form and manage pipelines that span any combination of: public cloud resources, private cloud resources, user on-premise resources, etc., in accordance with appropriate (cloud and/or on-premise) profile information. The pipeline manager can (re)configure a pipeline as appropriate to address alterations to workflows, upgrades to DevOps tools, removal of functionality from a workflow, etc. A pipeline framework enables customers to build no-code pipelines for various use cases in a plug and play manner (Software engineering and SDLC pipelines, Salesforce CI/CD pipelines, AI/ML, SaaS applications, Infrastructure as a code (IaC), etc). The pipeline framework enables users to integrate collaboration tools, notifications, and approval gates offering thresholds at each and every step. In addition, the pipeline framework captures logs and provides a summary via livestream and also upon completion of each pipeline activity and after each pipeline.

The present invention extends configuring development and operations pipelines using drag and drop techniques. Through user interface gestures, users can form and manage pipelines that span any combination of: public cloud resources, private cloud resources, user on-premise resources, etc., in accordance with appropriate (cloud and/or on-premise) profile information. The user interface facilitates pipeline (re)configuration as appropriate to address alterations to workflows, upgrades to DevOps tools, removal of functionality from a workflow, etc. The user interface enables customers to build no-code pipelines for various use cases in a drag and drop manner. Users can integrate collaboration tools, notifications, and approval gates offering thresholds at each and every step. In addition, the pipeline framework captures logs and provides a summary via livestream and also upon completion of each pipeline activity and after each pipeline.

The present invention extends configuring development and operations pipelines using access controlled gates and thresholds. A pipeline manager can form and manage pipelines that span any combination of: public cloud resources, private cloud resources, user on-premise resources, etc., in accordance with appropriate (cloud and/or on-premise) profile information. Pipelines can be configured with any of: quality gates, security gates, or thresholds. Role Based Access Control (RBAC) can be used to control access to and/or approval of gates and thresholds. A pipeline framework enables customers to build no-code pipelines for various use cases in a plug and play manner. The pipeline framework also enables users to integrate collaboration tools, notifications, and approval gates offering thresholds at each and every step. In addition, the pipeline framework captures logs and provides a summary via livestream and also upon completion of each pipeline activity and after each pipeline.

A method, system, and computer program product for decomposing monolithic applications to form microservices are provided. The method identifies a set of classes within a monolithic application. A set of horizontal clusters are generated by performing horizontal clustering to the set of classes to decompose the classes based on a first functionality type. The method generates a set of vertical clusters by performing vertical clustering to the set of classes to decompose the classes based on a second functionality type. A subset of classes occurring in a common horizontal cluster and vertical cluster are identified as a functional unit. The method merges one or more functional units to form a microservice.

An electronic device includes a processor having a micro-operation queue, multiple scheduler entries, and scheduler compression logic. When a pair of micro-operations in the micro-operation queue is compressible in accordance with one or more compressibility rules, the scheduler compression logic acquires the pair of micro-operations from the micro-operation queue and stores information from both micro-operations of the pair of micro-operations into different portions in a single scheduler entry. In this way, the scheduler compression logic compresses the pair of micro-operations into the single scheduler entry.