An apparatus includes a luminaire; power input for the luminaire; a modulation circuit for modulating the power input so that light output includes an identifier of the luminaire; and a programmable memory for storing at least one of the identifier of the luminaire and a modulation scheme for modulation of the luminaire to place a signal on the light. A method for modulating light includes storing in programmable memory an identifier for the luminaire, the identifier being used to modulate the light, and/or a modulation scheme for modulation of the luminaire; and changing content of programmable memory to change the identifier and/or the modulation scheme. A method of efficiently deploying the luminaires and identifying their locations to a network is disclosed. A method of multi-factor authentication using authentication data transmitted by modulating the light emitted by a luminaire is also disclosed.

A safety I/O module (10) disposed between a network (NW) and a target device (20) is provided. The safety I/O module (10) includes MCUs (121, 122). Further, the each of the MCUs (121, 122) includes a CPU (123) and an RTOS accelerator (124) configured to perform a process for switching a task executed by the CPU (123) and a process for starting the task.

A technique for varying firmware for different virtual functions in a virtualized device is provided. The virtualized device includes a hardware accelerator and a microcontroller that executes firmware. The virtualized device is virtualized in that the virtualized device performs work for different virtual functions (with different virtual functions associated with different virtual machines), each function getting a “time-slice” during which work is performed for that function. To vary the firmware, each time the virtualized device switches from performing work for a current virtual function to work for a subsequent virtual function, one or more microcontrollers of the virtualized device examines memory storing addresses for firmware for the subsequent virtual function and begins executing the firmware for that subsequent virtual function. The addresses for the firmware are provided by a corresponding virtual machine at configuration time.

A method for creating and executing a micro-application includes receiving a user selection of a user interface element within a user interface of a primary application. Source code associated with the selected user interface element is parsed to obtain at least one attribute associated with the selected user interface element. Data associated with the selected user interface element is identified based on the source code. A response based on the at least one attribute and the data is generated. A microapp configured to process the response to obtain the data from within the primary application is generated.

This disclosure provides an instruction transmitting unit, an instruction execution unit, and a related apparatus and method. The instruction transmitting unit includes: an instruction splitter adapted to split a to-be-executed vector instruction into microinstructions; a microinstruction index fetcher adapted to acquire a number-of-effective-elements index of the microinstructions resulting from the splitting based on an element range involved in the microinstructions; an index comparison subunit adapted to compare the acquired number-of-effective-elements index with a first index, where the first index is a number-of-effective-elements index of a fault-only-first microinstruction whose processing has not been completed; and a microinstruction transmission controller adapted to transmit the microinstructions resulting from the splitting to a vector execution unit for execution when the number-of-effective-elements index is less than the first index. This disclosure improves operating efficiency of subsequent vector instructions when a fault-only-first vector loading instruction is involved in chaining.

The present disclosure includes apparatuses and methods related to microcode instructions indicating instruction types. One example apparatus comprises a memory storing a set of microcode instructions. Each microcode instruction of the set can comprise a first field comprising a number of control data units, and a second field comprising a number of type select data units. Each microcode instruction of the set can have a particular instruction type defined by a value of the number of type select data units, and particular functions corresponding to the number of control data units are variable based on the particular instruction type.

A method for creating and executing a micro-application includes receiving a user selection of a user interface element within a user interface of a primary application. Source code associated with the selected user interface element is parsed to obtain at least one attribute associated with the selected user interface element. Data associated with the selected user interface element is identified based on the source code. A response based on the at least one attribute and the data is generated. A microapp configured to process the response to obtain the data from within the primary application is generated.

The present disclosure provides a packet modification method and apparatus, a computer device, and a storage medium. The method includes: dividing a field to be modified that is related to packet encapsulation information into M containers; performing instruction extraction on a very long instruction word executing a modification command, to obtain N groups of initial instructions, where 2≤N≤M; processing the N groups of initial instructions to obtain N groups of source operands and N groups of modification field configuration information; determining, according to the N groups of modification field configuration information, N containers matched with the N groups of source operands, respectively; and modifying, according to the N groups of source operands, the N matched containers, respectively.

Techniques for synchronous microthreaded execution are described. An example includes a logical processor to execute one or more threads in a first mode; and a synchronous microthreading (SyMT) co-processor coupled to the logical processor to execute lightweight microthreads, with each lightweight microthread having an independent register state, upon an execution of an instruction to enter into SyMT mode.

A host computer for emulating a target system includes a host memory, a CPU, and a host GPU. The host memory is configured to store a library of graphics functions and a VM. The VM includes a section of emulated memory storing target code configured to execute on the target system. The CPU is configured to execute the VM to emulate the target system. The VM is configured to execute the target code and intercept a graphics function call in the target code. The VM is further configured to redirect the graphics function call to a corresponding graphics function in the library of graphics functions stored in the host memory. The host GPU is configured to execute the corresponding graphics function to determine at least one feature configured to be rendered on a display coupled to the host GPU.