G06F9/226

Apparatus and methods related to microcode instructions indicating instruction types

The present disclosure includes apparatuses and methods related to microcode instructions. One example apparatus comprises a memory storing a set of microcode instructions. Each microcode instruction of the set can comprise a first field comprising a number of control data units, and a second field comprising a number of type select data units. Each microcode instruction of the set can have a particular instruction type defined by a value of the number of type select data units, and particular functions corresponding to the number of control data units are variable based on the particular instruction type.

INSTRUCTION EXECUTION METHOD AND INSTRUCTION EXECUTION DEVICE
20210208893 · 2021-07-08 ·

An instruction execution method includes the following steps: translating a macro-instruction into a first micro-instruction and a second micro-instruction, and marking first binding information on the first micro-instruction, and marking second binding information on the second micro-instruction; and simultaneously retiring the first micro-instruction and the second micro-instruction according to the first binding information and the second binding information. The first micro-instruction and the second micro-instruction are adjacent to one another in the micro-instruction storage space.

ELECTRONIC APPARATUS, SYSTEM AND METHOD CAPABLE OF REMOTELY MAINTAINING THE OPERATION OF ELECTRONIC APPARATUS
20210026743 · 2021-01-28 ·

The invention provides a system capable of remotely maintaining the operation of electronic apparatus. The system comprises a cloud management platform and at least one electronic apparatus. The electronic apparatus comprises a data storage device and an operating system maintenance device. The data storage device comprises a plurality of flash memories and a controller. The operating system maintenance device comprises a microprocessor and a network communication component. An operating system is installed in the flash memories of the data storage device. When the operating system of the electronic device is abnormal, the operating system maintenance device receives an operating system repairing instruction from the cloud management platform via the network communication component. The microprocessor of the cloud management platform repairs the operating system of the electronic apparatus according to the operating system repairing instruction, so that the operating system of the electronic apparatus can resume normal operation.

Containerized storage microservice with direct connection to requesting application container

A containerized storage microservice is described. The containerized storage microservice, and its corresponding architecture, provide an environment wherein an application container accesses containerized storage services through a direct connection. This allows the operating system file system to be effectively bypassed in the provision of storage services. In one example, a library provides a basic file system and is arranged underneath the application container. The library essentially intercepts storage requests and emulates a thin file system. Instead of invoking the kernel of the operating system to process each storage request, the library allows the storage request to bypass the kernel and pass the storage request to the storage microservice. The containerized storage microservices are available in different types, and are configured so that they can be stacked to provide customized sets of storage services to different types of application containers.

INSTRUCTION EXECUTION METHOD AND INSTRUCTION EXECUTION DEVICE
20200394043 · 2020-12-17 ·

An instruction execution device includes a processor. The processor includes an instruction translator, a reorder buffer, an architecture register, and an execution unit. The instruction translator receives a macro-instruction and translates the macro-instruction into a first micro-instruction, a second micro-instruction and a third micro-instruction. The instruction translator marks the first micro-instruction and the second micro-instruction with the same atomic operation flag. The execution unit executes the first micro-instruction to generate a first execution result and to store the first execution result in a temporary register. The execution unit executes the second micro-instruction to generate a second execution result and to store the second execution result in the architecture register. The execution unit executes the third micro-instruction to read the first execution result from the temporary register and to store the first execution result in the architecture register.

Automatically determining and modifying environments for running microservices in a performant and cost-effective manner

Deployments of microservices executing in a cloud are automatically managed. Some microservices are deployed on dedicated nodes, others in serverless configurations. Rates of invocation and runtime data of microservices are monitored. Responsive to the monitored rate of invocation of a microservice running serverless exceeding a given threshold, the microservice is automatically redeployed to a dedicated node. A microservice executing on a dedicated node may be redeployed serverless if the infrequency with which it is called is sufficient. Microservices can be automatically redeployed between different dedicated nodes with different capacities based on monitored usage. The underlying cloud service provider may be automatically monitored for changes in serverless support functionality. Responsive to these changes, the thresholds at which microservices are redeployed can be automatically adjusted. Microservices may also be redeployed, and thresholds adjusted, in response to serverless microservice failures resulting from insufficient support provided by the underlying cloud service provider.

ANALYTIC WORKLOAD PARTITIONING FOR SECURITY AND PERFORMANCE OPTIMIZATION

The present disclosure provides privacy preservation of analytic workflows based on splitting the workflow into sub-workflows each with different privacy-preserving characteristics. Libraries are generated that provide for formatting and/or encrypting data for use in the sub-workflows and also for compiling a machine learning algorithm for the sub-workflows. Subsequently, the sub-workflows can be executed using the compiled algorithm and formatted data.

Microservice-based data processing apparatus, method, and program

A microservice-based data processing apparatus, including: a type register, storing a list of types, a type being a semantic concept expression; and microservices each comprising an annotation of an input type and output types from the list; processing logic transforming input data expressed by the input type into output data expressed by the output types; and a messaging mechanism for inputting data, via a message, to a microservice, the mechanism defining a message format for structuring the messages. The format includes a first field specifying the data being input; and a second field specifying a type, from the list of types, semantically expressing the concept instantiated by the data. Each microservice includes a controller to receive a message from the mechanism having the format, and to respond by executing the logic when the type specified by the second field matches the input type of the microservice.

Microprocessor with booth multiplication

A microprocessor provides at least two storage areas and uses a datapath for Booth multiplication. According to a first and second field of a microinstruction, the datapath gets multiplicand number supply data from the first storage area and multiplier number supply data from the second storage area. The datapath operates according to a word length indicated in a third field of the microinstruction. The datapath gets multi-bit acquisitions for Booth multiplication from the multiplier number supply data. The datapath divides the multiplicand number supply data into multiplicand numbers according to the word length, and performs Booth multiplication on the multiplicand numbers based on the multi-bit acquisitions to get partial products. According to the word length, the datapath selects a part of the partial products to be shifted and added for generation of a plurality of products.

Microprocessor with dynamically adjustable bit width for processing data

A microprocessor with dynamically adjustable bit width is provided, which has a bit width register, a datapath, a statistical register, and a bit width adjuster. The bit width register stores at least one bit width. The datapath operates according to the bit width stored in the bit width register to acquire input operands from received data and process input operands. The statistical register collects calculation results of the datapath. The bit width adjuster adjusts the bit width stored in the bit width register based on the calculation results collected in the statistical register.