A processor comprises a microarchitectural feature and dynamic tuning unit (DTU) circuitry. The processor executes a program for first and second execution windows with the microarchitectural feature disabled and enabled, respectively. The DTU circuitry automatically determines whether the processor achieved worse performance in the second execution window. In response to determining that the processor achieved worse performance in the second execution window, the DTU circuitry updates a usefulness state for a selected address of the program to denote worse performance. In response to multiple consecutive determinations that the processor achieved worse performance with the microarchitectural feature enabled, the DTU circuitry automatically updates the usefulness state to denote a confirmed bad state. In response to the usefulness state denoting the confirmed bad state, the DTU circuitry automatically disables the microarchitectural feature for the selected address for execution windows after the second execution window. Other embodiments are described and claimed.

An information processing system including a device and a client terminal which is able to create action configuration data for implementing a plurality of functions in the device includes a first management unit configured to manage a first version of firmware for implementing a plurality of functions in the device and a second version of a schema usable in the firmware of the first version, a second management unit configured to manage the action configuration data, which has been created based on information managed by the first management unit, and the second version, and a transmission unit configured to, in response to a request from the device, specify the action configuration data managed by the second management unit and to transmit the specified action configuration data and the first version to the device.

In one implementation, systems and methods are provided for developing a computer-implemented digital experience application having a first and a second micro-application. Each micro-application includes a front end interface configured to receive and display information. The first micro-application includes a first event manager configured to detect an application event belonging to a category, and a first state manager configured to detect an application state belonging to the category. The digital experience application further includes a driver application configured to host the first and second micro-applications, an event hub configured to receive the detected application event from the first micro-application, and a state store configured to store the detected application state received from the first micro-application. The second micro-application includes a second event manager configured to receive the detected application event from the event hub, and a second state manager configured to receive the detected application state from the state store.

This disclosure provides an instruction transmitting unit, an instruction execution unit, and a related apparatus and method. The instruction transmitting unit includes: an instruction splitter adapted to split a to-be-executed vector instruction into microinstructions; a microinstruction index fetcher adapted to acquire a number-of-effective-elements index of the microinstructions resulting from the splitting based on an element range involved in the microinstructions; an index comparison subunit adapted to compare the acquired number-of-effective-elements index with a first index, where the first index is a number-of-effective-elements index of a fault-only-first microinstruction whose processing has not been completed; and a microinstruction transmission controller adapted to transmit the microinstructions resulting from the splitting to a vector execution unit for execution when the number-of-effective-elements index is less than the first index. This disclosure improves operating efficiency of subsequent vector instructions when a fault-only-first vector loading instruction is involved in chaining.

This disclosure provides an instruction transmitting unit, an instruction execution unit, and a related apparatus and method. The instruction transmitting unit includes: an instruction splitter adapted to split a to-be-executed vector instruction into microinstructions; a microinstruction index fetcher adapted to acquire a number-of-effective-elements index of the microinstructions resulting from the splitting based on an element range involved in the microinstructions; an index comparison subunit adapted to compare the acquired number-of-effective-elements index with a first index, where the first index is a number-of-effective-elements index of a fault-only-first microinstruction whose processing has not been completed; and a microinstruction transmission controller adapted to transmit the microinstructions resulting from the splitting to a vector execution unit for execution when the number-of-effective-elements index is less than the first index. This disclosure improves operating efficiency of subsequent vector instructions when a fault-only-first vector loading instruction is involved in chaining.

Disclosed are various embodiments for provisioning client devices. A configuration file previously installed on the computing device can be read. The configuration file can contain a provisioning address. Then, a user account is automatically created using a predefined username and credential stored in the configuration file. Next, an enrollment request can be sent to the provisioning address to enroll the computing device with a provisioning service using the user account. In response, an enrollment response can be received from the provisioning service. The computing device can then be configured based upon the enrollment response.

Disclosed are apparatuses, methods, and computer-readable media for providing flexible command pointers to microcodes in a memory device. In one embodiment, a method is disclosed comprising receiving a command to access a memory device; accessing a configuration parameter; identifying a program counter value based on the configuration parameter and the command; and loading and executing a microcode based on the program counter.

Disclosed are apparatuses, methods, and computer-readable media for providing flexible command pointers to microcodes in a memory device. In one embodiment, a method is disclosed comprising receiving a command to access a memory device; accessing a configuration parameter; identifying a program counter value based on the configuration parameter and the command; and loading and executing a microcode based on the program counter.

A method for executing a binary code of a secure function includes obtaining a pointer containing: a first range of bits containing the address of a line of code, and a second, different range of bits containing an identifier of the pointer, storing the line of code, this line of code containing a first integrity tag constructed or encrypted using the identifier of the pointer, loading the line of code from the address contained in the first range of bits of the pointer, verifying the integrity of the loaded line of code by constructing a second integrity tag using the identifier of the pointer contained in the second range of bits of the pointer used to load it.

A method for executing a binary code of a secure function includes obtaining a pointer containing: a first range of bits containing the address of a line of code, and a second, different range of bits containing an identifier of the pointer, storing the line of code, this line of code containing a first integrity tag constructed or encrypted using the identifier of the pointer, loading the line of code from the address contained in the first range of bits of the pointer, verifying the integrity of the loaded line of code by constructing a second integrity tag using the identifier of the pointer contained in the second range of bits of the pointer used to load it.