Patent classifications
G06F9/30003
METHOD AND APPARATUS FOR CONTROLLING RESOURCE SHARING IN REAL-TIME DATA TRANSMISSION SYSTEM
The present disclosure provides an apparatus and method of controlling a resource sharing in a real-time data transmission network which can increase a network efficiency by decentralizing data operation loads and reducing duplicate operations. The resource sharing control device is one of a plurality of devices included in a real-time data transmission system which delivers transmit data provided by a data producer to a data consumer. At least one instruction when executed by the processor causes the processor to: establish a delivery path passing at least some of the plurality of resource sharing control devices in the real-time data transmission system and through which the transmit data is delivered; and decompose an operation to be performed on the transmit data into a plurality of partial operations and allocate each of the partial operations to one or more of the plurality of resource sharing control devices on the delivery path.
System command processing
Techniques for routing a user command to a speechlet and resolving conflicts between potential speechlets are described. A system determines an intent of an input command. The system also receives context information associated with the input command. The system determines speechlets (e.g., speechlets and/or skills) that may execute with respect to the input command given the intent and the context data. The system then determines whether conditions of routing rules, associated with the speechlets, are satisfied given the context data. If the conditions of only one routing rule are satisfied, the system causes the speechlet associated with the routing rule to execute with respect to the input command. If the conditions of more than one routing rule are satisfied, the system may determine a speechlet to execute with respect to the input command based on the speechlets' priorities in a list of speechlets and/or based on potential output data provided by the speechlets.
Test system and method for carrying out a test in a coordinated manner
A test system for testing a control unit of a system includes a management server which is configured to provide predefined test instructions, a monitoring system, and a number of output units. The monitoring system is configured to convert test instructions provided by the management server into operating instructions for setting a test configuration on a control unit of a system using predefined assignment logic. The monitoring system is also configured to divide operating instructions for setting the test configuration into partial instructions for setting a partial configuration on the control unit and to temporally and/or logically classify the partial instructions. Respective output units of the number of output units are configured to output the partial instructions transmitted by the monitoring system.
IMAGE REGISTRATION FOR PRINTING
A method for printing on an article can include positioning an article and a fiducial within a field of view of an image sensor. The method can also include generating an image of the article and the fiducial, using the fiducial to determine a print location on the article, and printing a graphic on the article at the print location. A method for printing on an article additionally or alternatively can include transforming a graphic using a shape model to produce a transformed graphic and printing the transformed graphic on the article. A method for printing on an article additionally or alternatively can include retrieving a shape model corresponding to a reference article, obtaining a configuration file corresponding to the article, transforming a graphic based on the shape model and the configuration file to produce a transformed graphic, and printing the transformed graphic on the article.
SYSTEM ON A CHIP AND METHOD FOR OPERATING A SYSTEM ON A CHIP
In various examples, a system on a chip is provided that is configured to be operated in a debug mode. The system on a chip includes a plurality of processor cores including a plurality of virtual machines and a further processor core, configured to, in the debug mode, initially execute first debug instructions after the system on a chip has started operating. The first debug instructions are configured to cause the further processor core to make a debug setting that, after the first debug instructions are executed, prevents a processor core executing second debug instructions from accessing at least one of the virtual machines and allows the processor core executing the second debug instructions to access at least one other of the virtual machines.
Apparatuses, methods, and systems for a user defined formatting instruction to configure multicast Benes network circuitry
Systems, methods, and apparatuses relating to a user defined formatting instruction to configure multicast Benes network circuitry are described. In one embodiment, a processor includes a decoder to decode a single instruction into a decoded single instruction, the single instruction having fields that identify packed input data, packed control data, and a packed data destination; and an execution unit to execute the decoded single instruction to: send the packed control data to respective control inputs of a circuit that comprises an inverse butterfly circuit coupled in series to a butterfly circuit, wherein the inverse butterfly circuit comprises a first plurality of stages of multicast switches and the butterfly circuit comprises a second plurality of stages of multicast switches, read, once from storage separate from the circuit, each element of the packed input data as respective inputs of the circuit, route the packed input data through the circuit according to the packed control data, and store resultant packed data from the circuit into the packed data destination.
Decentralized data processing architecture
A system and method for decentralized data processing includes receiving, by a first data processing unit of a data processing unit array, a user request and sending, by the first data processing unit, the user request to at least one of other data processing units of the data processing unit array. Each of the first data processing unit and the other data processing units include a dedicated non-volatile memory. The system and method also include receiving, by the first data processing unit, a code of execution results from each of the other data processing units that execute the user request, combining, by the first data processing unit, the code of execution results from the each of the other data processing units that execute the user request, and responding, by the first data processing unit, to the user request by transmitting the combined code of execution results.
Secure management of transactions using a smart/virtual card
A method securely manages smart card transactions. A processing entity receives a smart card identifier from a smart card, where the smart card is a virtual card on a mobile computing device that comprises a processor, where the smart card identifier is a transaction-specific identifier for a transaction. A protected application is received at the mobile computing device, where a received protected application initially cannot be utilized by an operating system for execution by the processor. A security object is received at the mobile computing device, where the security object is used to convert the received protected application into an executable application that can be utilized by the operating system for execution by the processor. The processor executes the executable application to act as the virtual card, where the virtual card provides a functionality of a predefined physical electronic card.
Vector length querying instruction
A data processing system 2 supporting vector processing operations uses scaling vector length querying instructions. The scaling vector length querying instructions return a result which is dependent upon a number of elements in a vector for a variable vector element size specified by the instruction and multiplied by a scaling value specified by the instruction. The scaling vector length querying instructions may be in the form of count instructions, increment instructions or decrement instructions. The instructions may include a pattern constraint applying a constraint, such as modulo(M) or power of 2 to the partial result value representing the number of vector elements provided for the register element size specified for the instruction.
METHODS, SYSTEMS, ARTICLES OF MANUFACTURE AND APPARATUS TO IMPROVE TAGGING ACCURACY
Methods, apparatus, systems, and articles of manufacture are disclosed to improve tagging accuracy. An example apparatus includes at least one memory, machine readable instructions, and processor circuitry to execute the machine readable instructions to at least search a first row of a document to identify a first row that includes a first type of entity, search the first row of the document to identify a second type of entity that is missing, search the first row of the document to identify a first integer value, and associate the first row with a product corresponding to the first integer value.