A user device parses system information block data, received from a first cell, to identify an upper layer indicator element, and determines, based on the upper layer indicator element, that the user device is in an EN-DC area. The user device causes, based on determining that the user device is in the EN-DC area, first display of a first indicator on a display of the user device, and sends a request to the first cell for a data connection. The user device receives, from the first cell, a message that indicates a second cell will initiate the data connection via a 5G NR millimeter wave connection. The user device causes, based on the message, display of a second indicator on the display of the user device for a threshold amount of time, and then causes second display of the first indicator on the display of the user device.

An electronic device is provided. The electronic device includes a memory configured to store a computer executable instructions; and a processor configured to execute the executable instructions to: determine a text corresponding to a received command, provide response information on the command based on a first artificial intelligence model classifying the text as a text corresponding to one of a plurality of pre-stored texts, and provide error information on the command based on the first artificial intelligence model classifying the text as an error, wherein the first artificial intelligence model is configured to classify the text as the error based on the text corresponding to the command being a similar text having one of an entity and an intent different from at least one of the plurality of pre-stored texts.

The present disclosure discloses a debug unit, comprising: a write register configured to store kernel write data written by a kernel of a processor, wherein the processor is communicatively coupled to a debugger configured to read the kernel write data, wherein the kernel write data is associated with a kernel write flag bit to indicate data validity of the kernel write data; and a control unit including circuitry configured to control access to the write register by the kernel of the processor and the debugger based on data validity indicated by the kernel write flag bit. The present disclosure further discloses a corresponding processor including the debug unit, a corresponding debugger communicatively coupled to the processor, and a corresponding debug system including the processor coupled to the debugger.

A method, a system and a computer program product for performing software configuration alignment. An indication of a source configuration change of one or more source computing processes of a source computing system is received from the source computing system. A determination is made whether the source configuration change is applicable to one or more target computing processes of a target computing system. The target computing system is communicatively coupled to the source computing system. Using the source configuration change, a target configuration change for implementation in the target computing processes of the target computing system is generated. The generated target configuration change is transmitted to the target computing system. The generated target configuration change is implemented in the target computing processes of the target computing system.

System and techniques for tag checking procedure calls include specifying a value for a color in a program-counter relative (PC-relative) call instruction from a call site to a call target. A pointer is provided to steer the PC-relative call instruction to the call target based on the color. A function call is generated to the call target based on the pointer. Other systems, methods and apparatuses are also described.

An image capture device may switch operation between a spherical capture mode or a non-spherical capture mode. Operation of the image capture device in the spherical capture mode includes generation of spherical visual content based on the visual content generated by multiple image sensors. Operation of the image capture device in the non-spherical capture mode includes generation of non-spherical visual content based on visual content generated by a single image sensor.

In one embodiment, the present invention includes a method for receiving incoming data in a processor and performing a checksum operation on the incoming data in the processor pursuant to a user-level instruction for the checksum operation. For example, a cyclic redundancy checksum may be computed in the processor itself responsive to the user-level instruction. Other embodiments are described and claimed.

Embodiments of an apparatus comprising a decoder to decode an instruction having fields for an opcode and a destination operand and execution circuitry to execute the decoded instruction to perform a save of processor state components to an area located at a destination memory address specified by the destination operand, wherein a size of the area is defined by at least one indication of an execution of an instruction operating on a specified group of processor states are described.

A system for reconstructing wafer maps of semiconductor wafers includes: a processor; and memory having instructions stored thereon that, when executed by the processor, cause the processor to: receive test data of a wafer at sparse sampling locations of the wafer, the sparse sampling locations being selected based on a probing mask; and compute a reconstructed wafer map by performing compressed sensing with Zernike polynomials on the test data at sparse locations of the wafer.

A computing system having memory components, including first memory and second memory. The computing system further includes a processing device, operatively coupled with the memory components, to: store a memory allocation value in association with a context of executing instructions; execute a set of instructions in the context; allocate, for execution of the set of instructions in the context, an amount of memory, including an amount of the first memory and an amount of the second memory; and access the amount of the second memory via the amount of the first memory during the execution of the set of instructions in the context.