Embodiments of the present invention include a memory controller including a buffer memory configured to store program data, an instruction set configurator configured to configure an instruction set describing a procedure for programming the program data stored in the buffer memory to target memory blocks, an instruction set performer configured to sequentially perform instructions in the instruction set and generate an interrupt at a time of completion of performance of a last instruction among the instructions, and a central processing unit configured to erase the program data stored in the buffer memory when the interrupt is received from the instruction set performer. The instruction set configurator may configure the instruction set differently according to whether a non-interleaving block group exists among the target memory blocks.

An instruction execution method for a microprocessor is provided. The microprocessor includes a model specific register (MSR). And, the instruction execution method includes the following steps. A target instruction is received using an instruction cache. The target instruction is decoded using an instruction translator to determine whether the target instruction is a specific instruction is a specific instruction. When the target instruction is the specific instruction, a model specific register index of the target instruction is obtained to directly read or write the model specific register.

A Multi-Purpose Dynamic Simulation and run-time Control platform includes a virtual process environment coupled to a physical process environment, where components/nodes of the virtual and physical process environments cooperate to dynamically perform run-time process control of an industrial process plant and/or simulations thereof. Virtual components may include virtual run-time nodes and/or simulated nodes. The MPDSC includes an I/O Switch which delivers I/O data between virtual and/or physical nodes, e.g., by using publish/subscribe mechanisms, thereby virtualizing physical I/O process data delivery. Nodes serviced by the I/O Switch may include respective component behavior modules that are unaware as to whether or not they are being utilized on a virtual or physical node. Simulations may be performed in real-time and even in conjunction with run-time operations of the plant, and/or simulations may be manipulated as desired (speed, values, administration, etc.). The platform simultaneously supports simulation and run-time operations and interactions/intersections therebetween.

A method for loading multiple versions of the same native library in a native runtime environment. In one embodiment, the method comprises cloning a native library workspace with a first version number as a cloned native library; applying a namespace across the cloned native library; injecting a macro into source code associated with the cloned native library; adding a dependency to the cloned native library in source code associated with the native runtime environment; and registering the first version number in a project configuration of the native runtime environment.

A computer-implemented method includes preprocessing, by a compiler, a plurality of macros in a computer program. Preprocessing a macro includes identifying a compile time condition associated with the macro. Preprocessing the macro further includes determining a current value of the compile time condition at the time of compiling a computer instruction and a previous value of the compile time condition. Preprocessing the macro further includes determining a set of computer instructions enclosed by the macro. The method further includes storing a macro information record that includes the compile time condition, the current value and the previous value of the compile time condition, and an identification of the set of computer instructions enclosed by the macro.

Data flows and data processing modules are provided to fulfill the implementation of: contextualized data collection, scalable analytics, and machine learning operations quality assurance. These modules may be implemented as standalone components, and/or bundled as a group of coordinated microservices. The conversion of raw domain expertise and knowledge into data processors, analytics, and visualization modules for industry oriented Industrial Internet of Things (IIoT) solutions is streamlined.

A method for executing new instructions includes receiving an instruction, and determining whether the received instruction is a new instruction according to an operation code of the received instruction. When the received instruction is a new instruction, the basic decoding information of the received instruction is stored in a private register. And, the system for executing the new instructions enters a system management mode, and simulates the execution of the received instruction according to the basic decoding information stored in the private register in the system management mode; wherein the basic decoding information includes the operation code.

A document to be stored on a network-based storage system is identified. The document includes one or more macros in a first programming language. An object referenced by a function defined by a macro of the one or more macros is identified. The function is converted into one or more sets of operations represented in a second programming language. Each set of operations corresponds to one of one or more candidate object types associated with the object. At least one of the one or more sets of operations is to be performed with respect to the object responsive to indication of a corresponding candidate object type for the object during execution of the macro. The document including the one or more sets of operations represented in the second programming language is stored on the network-based storage system.

A method for collaborative logic designing and debugging of a circuit includes initiating, via a session manager, a hardware debug session that includes a plurality of instances of client applications that can access one or more source-codes associated with a logic design of the circuit, the plurality of instances of client applications configured to replicate an execution state of the logic design. The method also includes analyzing, using an instance of a first client application from the plurality of instances of client applications, a defect in the logic design based on the execution state of the logic design. The method also includes editing, using an instance of a second client application from the plurality of instances of client applications, the one or more source-codes, to repair the defect in the logic design.

According to one embodiment, a processor includes an instruction decoder to decode a first instruction to gather data elements from memory, the first instruction having a first operand specifying a first storage location and a second operand specifying a first memory address storing a plurality of data elements. The processor further includes an execution unit coupled to the instruction decoder, in response to the first instruction, to read contiguous a first and a second of the data elements from a memory location based on the first memory address indicated by the second operand, and to store the first data element in a first entry of the first storage location and a second data element in a second entry of a second storage location corresponding to the first entry of the first storage location.