A Basic Input Output System (BIOS)-based multi-user management method and system. The method includes: identifying states of multiple users of a current BIOS to find a user whose state is an enable state; finding a Non-Volatile Random Access Memory (NVRAM) corresponding to the user in the enable state, and reading BIOS configuration parameter information of the user in the enable state; monitoring a hot key boot phase of a BIOS startup process to determine whether there is a key action at the hot key boot phase; and when there is no key action, performing a manipulation to configure the current BIOS with the read BIOS configuration parameter information of the user in the enable state, thereby effectively configuring the BIOS for the multiple users, and retaining more customized parameters in BIOS information. Therefore, a server becomes a diversely used terminal device more easily.

A Basic Input Output System (BIOS)-based multi-user management method and system. The method includes: identifying states of multiple users of a current BIOS to find a user whose state is an enable state; finding a Non-Volatile Random Access Memory (NVRAM) corresponding to the user in the enable state, and reading BIOS configuration parameter information of the user in the enable state; monitoring a hot key boot phase of a BIOS startup process to determine whether there is a key action at the hot key boot phase; and when there is no key action, performing a manipulation to configure the current BIOS with the read BIOS configuration parameter information of the user in the enable state, thereby effectively configuring the BIOS for the multiple users, and retaining more customized parameters in BIOS information. Therefore, a server becomes a diversely used terminal device more easily.

Systems, apparatuses and methods may provide for technology that initializes an integrated memory of a processor during a boot sequence and conducts a runtime initialization of an external system memory associated with the processor. The technology may also bypass the runtime initialization of the external system memory during the boot sequence.

A firmware massive update method using a flash memory includes: a firmware data registration step of receiving, from a manufacturer server, at least one of information of a user device that is a firmware update target, and firmware information and registering the received information as firmware data; a firmware data management step of receiving a request from a firmware update server in which the registered firmware data is stored, and storing and managing the registered firmware data in a specific area of a flash memory included in the user device via a network; and a firmware update execution step of executing a firmware update on the firmware data managed in the specific area of the flash memory included in the user device through the firmware update server.

A firmware massive update method using a flash memory includes: a firmware data registration step of receiving, from a manufacturer server, at least one of information of a user device that is a firmware update target, and firmware information and registering the received information as firmware data; a firmware data management step of receiving a request from a firmware update server in which the registered firmware data is stored, and storing and managing the registered firmware data in a specific area of a flash memory included in the user device via a network; and a firmware update execution step of executing a firmware update on the firmware data managed in the specific area of the flash memory included in the user device through the firmware update server.

A system-on-chip (SoC) may be configured to enable a Multi-Chip Daisy Chain Topology using peripheral component interface express (PCIe). The SoC may include a processor, a local memory, a root complex operably connected to the processor and the local memory, and a multi-function endpoint controller. The root complex may obtain forwarding information to configure routing of transactions to one or more PCIe endpoint functions or to the local memory. The root complex may initialize, based on the forwarding information, access between a host and the one or more PCIe endpoint functions. The multi-function endpoint controller may obtain a descriptor and endpoint information to configure outbound portals for transactions to at least one remote host. The multi-function endpoint controller may establish a communication path between the host and a function out of a plurality of functions.

Embodiments described herein are generally directed to selective multithreaded execution of memory training by CPU sockets. In an example, a memory configuration and a current phase of execution of memory training for each of multiple CPU sockets of a computer system is received. Based on the memory configuration and the current phase of execution of each of the CPU sockets an estimated power usage across all CPU sockets may be determined. Based on the estimated power usage and a power consumption threshold (e.g., PTAM or PA), performance of the current phase of execution of one or more CPU sockets may be selectively released for one or more channels of the one or more CPU sockets.

Apparatus and methods related providing application execution information (AEI) are provided. A server can receive a request to provide a software package for a particular software application. The server can determine composite AEI (CAEI) for the particular software application. The CAEI can include a composite list of software with data about software methods of the particular software application executed by a computing device other than the server. The server can extract particular AEI related to the particular software application from the CAEI. The particular AEI can provide compiler hints for compiling at least one software method predicted to be executed by the particular software application. The server can generate the software package, where the software package can include the particular software application and the particular AEI. The server can provide the software package.

A method for setting a display panel dynamically and an electronic device are provided. In a booting stage of the electronic device, a display driver is executed, wherein a motherboard of the electronic device includes at least one specified pin, a storage device and a processor. A predetermined pin value is set in the at least one specified pin and read from the at least one specified pin of the motherboard through the display driver. A database is queried through the display driver and includes multiple reference pin values corresponding to multiple sets of parameter values. The set of parameter values corresponding to the predetermined pin value is obtained according to the reference pin values; and the display panel is initialized through the display driver using the set of parameter values corresponding to the predetermined pin value.

Disclosed herein are a method for secure booting using a route switchover function for a boot memory bus and an apparatus using the same. The method includes maintaining a reset state in order to prevent a processor from being booted, interrupting the connection between the processor and boot memory, verifying the integrity of first boot firmware stored in the boot memory, determining whether hardware damage is detected, and releasing the reset state of the processor and the interrupted state of the connection between the processor and the boot memory in consideration of whether hardware damage is detected and verification of the integrity in order to allow the processor to be booted.