Systems and methods for scheduling usage time for programs that can be executed on a hybrid computing system including a quantum processing unit (QPU) and a central processing unit (CPU). Programs can comprise both QPU-executable tasks and CPU-executable tasks. Some programs can be considered high performance programs that are intolerant of interruptions to QPU-executable tasks and some programs can be considered low performance programs that are tolerant of interruptions to QPU-executable tasks. After a high performance program finishes executing QPU-executable tasks on a QPU, a low performance program may execute QPU-executable tasks on the QPU while the high performance program executes CPU-executable tasks on a CPU. Execution of QPU-executable tasks of a low performance program on a QPU can pause or stop if a high performance program is queued.

The present invention is a novel RTOS/OS architecture that changes the fundamental way that context switching is performed. In all prior operating system implementations, context switching required disabling of interrupts. This opens the possibility that data can be lost. This novel approach consists of a context switching method in which interrupts are never disabled. Two implementations are presented. In the first implementation, the cost is a negligible amount of memory. In the second, the cost is only a minimal impact on the context switching time. This RTOS/OS architecture requires specialized hardware. Concretely, an advanced interrupt controller that supports nesting and tail chaining of prioritized interrupts is needed (e.g. the Nested Vectored Interrupt Controller (NVIC) found on many ARM processors). The novel RTOS/OS architecture redefines how task synchronization primitives such as semaphores and mutexes are released. Whereas previous architectures directly accessed internal structures, this architecture does so indirectly by saving information in shared buffers or setting flags, and then activating a low priority software interrupt that subsequently interprets this data and performs all context switching logic. The software interrupt must be set as the single lowest priority interrupt in the system.

An apparatus for handling exceptions, including a processing circuitry operable in at least one security domain to execute program code that includes a plurality of exception handling routines executed in response to corresponding exceptions, and a plurality of registers for storing data for access by the processing circuitry when executing the program code. The exception control circuitry is arranged in response to occurrence of a given exception from background processing to trigger a state saving operation to save data from the plurality of registers before triggering the processing circuitry to execute a given exception handling routine. Configuration storage provides configuration information used to categorise exception handling routines. The exception control circuitry is arranged to determine with reference to the configuration information whether the given exception handling routine is of a first or second category within the security domain that the given exception handling routine will be executed in.

Aspects of the disclosure provide for mechanisms for managing containers across operating systems in a computer system. A method of the disclosure includes: running a first container corresponding to a first operating system, wherein the first container is created in view of a container image; receiving a user request to switch from the first operating system to a second operating system; in response to receiving the user request, switching, by a processing device, from the first container to a second container corresponding to the second operating system, wherein the second container is created in view of the container image, wherein switching from the first container to the second container comprises: configuring the second container in view of a plurality of configurations of the first container; and running the configured second container.

The disclosed computer-implemented method may include (1) provisioning a cloud gaming environment with a plurality of containers that share a single operating system instance, (2) allocating each container within the plurality of containers to a corresponding user, (3) executing, concurrently, within each container within the plurality of containers a corresponding video game instance and (4) streaming, concurrently, from the cloud gaming environment, a video game instance from each container within the plurality of containers to a corresponding client system. Various other methods, systems, and computer-readable media are also disclosed.

A computer program stored in a computer readable storage medium is provided. It includes encoded commands, in which when the computer program is executed by one or more processors of a computer system. The computer program allows the one or more processors to perform certain commands for distributing resources of a computing device.

A system and method which allows the basic checkpoint-reverse-mode AD strategy (of recursively decomposing the computation to reduce storage requirements of reverse-mode AD) to be applied to arbitrary programs: not just programs consisting of loops, but programs with arbitrarily complex control flow. The method comprises (a) transforming the program into a formalism that allows convenient manipulation by formal tools, and (b) introducing a set of operators to allow computations to be decomposed by running them for a given period of time then pausing them, while treating the paused program as a value subject to manipulation.

The discussion relates to automatically providing information about what code sequences contribute to a length of time a program takes to execute. One example can collect context switch and ready thread event tracing data from a program over a period of interest and identify time blocks of program threads from the period of interest. The example can distinguish individual time blocks that contribute to execution time for the period of interest from other individual time blocks that do not contribute to the execution time.

A storage medium according to various embodiments may store instructions. When the instructions are executed by a processor of a computer including an operating system which provides an activation state in which the instructions are executed in a foreground in relation to at least one application program, a suspended state in which the instructions are executed but do not perform a command in a background in relation thereto, and a background state in which the instructions are executed and perform a command in a background in relation thereto, the instructions may cause the computer to: in relation to an application program configured to perform a task, store information on the task in a memory of the computer; after a state of the application program is changed from an activation state to a suspended state, receive a push message from an outside of the computer; change the state of the application program from the suspended state to a background state, according to reception of the push message; and allow the application program to perform the task on the basis of the information on the task in the background state. Further, an electronic device according to various embodiments may be provided.

A system and method for providing dynamic device virtualization is herein disclosed. According to one embodiment, the computer-implemented method includes providing a hypervisor and one or more guest virtual machines (VMs). Each guest VM is disposed to run a guest user process and the hypervisor is split into a device hypervisor and a compute hypervisor. The computer-implemented method further includes providing an interface between the device hypervisor and the compute hypervisor. The compute hypervisor manages an efficient use of CPU and memory of a host and the device hypervisor manages a device connected to the host by exploiting hardware acceleration of the device.