G06F9/54

Unified operating system for distributed computing
11579848 · 2023-02-14 · ·

In some embodiments, a real-time event is detected and context is determined based on the real-time event. An application model is fetched based on the context and meta-data associated with the real-time event, the application model referencing a micro-function and including pre-condition and post-condition descriptors. A graph is constructed based on the micro-function. The micro-function is transformed into micro-capabilities by determining a computing resource for execution of a micro-capability by matching pre-conditions and post-conditions of the micro-capability, and enabling execution and configuration of the micro-capability on the computing resource by providing access in a target environment to an API capable of calling the micro-capability to configure and execute the micro-capability. A request is received from the target environment to execute and configure the micro-capability on the computing resource. The micro-capability is executed and configured on the computing resource, and an output of the micro-capability is provided to the target environment.

Community server for secure hosting of community forums via network operating system in secure data network
11582241 · 2023-02-14 · ·

In one embodiment, a method comprises: receiving, by a secure executable container executed by a network device, a request initiated by a user for a community forum in a secure data network, the user having generated the request via an endpoint device and the user having established a two-way trusted relationship with the endpoint device in the secure data network; processing, by the secure executable container, the request for the community forum in the secure data network, the processing including causing a network device executing a community server to post the community forum in the secure data network according to identifiable features selected by the user; and preventing, by the secure executable container, any executable resource in the network device from accessing the secure data network without authorized access via a prescribed Application Programming Interface (API) required by the secure executable container.

Message transmitting and receiving method, communication apparatus, and program

A message transmitting and receiving method according to one aspect is performed by a communication apparatus, the communication apparatus including a middleware unit configured to manage a message published by a publisher in a publish/subscribe system in which a message is exchanged between the publisher and a subscriber via a broker, and a storage unit configured to store a library including functions configured to provide the broker, and includes the steps of performing, by the middleware unit, subscribing on the broker by setting a callback function, and upon receipt of a first message published by a device, passing, by the broker, the first message to the middleware unit by calling the callback function.

Computer memory management in computing devices

Techniques for computer memory management are disclosed herein. In one embodiment, a method includes in response to receiving a request for allocation of memory, determining whether the request is for allocation from a first memory region or a second memory region of the physical memory. The first memory region has first memory subregions of a first size and the second memory region having second memory subregions of a second size larger than the first size of the first memory region. The method further includes in response to determining that the request for allocation of memory is for allocation from the first or second memory region, allocating a portion of the first or second multiple memory subregions of the first or second memory region, respectively, in response to the request.

Task delegation and cooperation for automated assistants

Task delegation and cooperation for automated assistants is presented. A method comprises receiving, at a centralized support center that is in contact with a plurality of automated assistants including a first automated assistant and a second automated assistant, a request to perform a task on behalf of an individual, formulating, at the centralized support center, the task as a plurality of sub-tasks including a first sub-task and a second sub-task, delegating, at the centralized support center, the first sub-task to the first automated assistant, based on a determination at the centralized support center that the first automated assistant is capable of performing the first sub-task, and delegating, at the centralized support center, the second sub-task to the second automated assistant, based on a determination at the centralized support center that the second automated assistant is capable of performing the second sub-task.

Queues reserved for direct access via a user application
11581943 · 2023-02-14 · ·

A storage controller includes a processing device to send a Non-Volatile Memory Express over Fibre Channel (NVMe/FC) command to a submission queue without routing the NVMe/FC command through a kernel space, the submission queue being reserved for direct access by an initiator device to a user space of the storage controller.

Reducing save restore latency for power control based on write signals

A method of save-restore operations includes monitoring, by a power controller of a parallel processor (such as a graphics processing unit), of a register bus for one or more register write signals. The power controller determines that a register write signal is addressed to a state register that is designated to be saved prior to changing a power state of the parallel processor from a first state to a second state having a lower level of energy usage. The power controller instructs a copy of data corresponding to the state register to be written to a local memory module of the parallel processor. Subsequently, the parallel processor receives a power state change signal and writes state register data saved at the local memory module to an off-chip memory prior to changing the power state of the parallel processor.

Method for managing multiple operating systems in a terminal

The disclosure provides a method for managing multiple operating systems in a terminal. The terminal includes multiple operating systems and a management system. The management system is configured to manage the multiple operating systems. The management system includes a cross-system application database. The method includes: when a first operating system in the multiple operating systems runs in a foreground, and a second operating system in the multiple operating systems runs in a background, if the second operating system receives a first message of a first application in the second operating system, sending, by the second operating system, a notification message to the management system; storing, by the management system, the notification message into the cross-system application database; and listening, by the first operating system, on the cross-system application database, and outputting a prompt of the first message when listening and obtaining the notification message.

Method for managing multiple operating systems in a terminal

The disclosure provides a method for managing multiple operating systems in a terminal. The terminal includes multiple operating systems and a management system. The management system is configured to manage the multiple operating systems. The management system includes a cross-system application database. The method includes: when a first operating system in the multiple operating systems runs in a foreground, and a second operating system in the multiple operating systems runs in a background, if the second operating system receives a first message of a first application in the second operating system, sending, by the second operating system, a notification message to the management system; storing, by the management system, the notification message into the cross-system application database; and listening, by the first operating system, on the cross-system application database, and outputting a prompt of the first message when listening and obtaining the notification message.

Quasi-volatile system-level memory

A high-capacity system memory may be built from both quasi-volatile (QV) memory circuits, logic circuits, and static random-access memory (SRAM) circuits. Using the SRAM circuits as buffers or cache for the QV memory circuits, the system memory may achieve access latency performance of the SRAM circuits and may be used as code memory. The system memory is also capable of direct memory access (DMA) operations and includes an arithmetic logic unit for performing computational memory tasks. The system memory may include one or more embedded processor. In addition, the system memory may be configured for multi-channel memory accesses by multiple host processors over multiple host ports. The system memory may be provided in the dual-in-line memory module (DIMM) format.