Systems and methods of modifying a program binary by injecting code into a function of a program binary that tokenizes the return address of the function. The tokenization of the return address improves the robustness of the program binary against cyberattacks. For example, an attacker's attempt to hijack program flow before a function return will fail since any return address modified by the adversary will be tokenized (e.g., using a binary operation such as an XOR) resulting in an unusable address that will cause the system to crash. One advantage of the improved CFI consumes less average overhead and does not require all of the complications of the conventional CFI systems. In some embodiments, the tokenization includes applying a binary operation on a randomly-generated token and the return address. The token can be generated at transform time, load time, or run time.

An information processing system is provided. The information processing system generates a program so as to output a hash value calculated based on a hash value calculation instruction included in a source code for generating the program, determines a set of analysis support information associated with the hash value calculation instruction and the hash value calculated based on the hash value calculation instruction, stores the set of the analysis support information and the hash value, stores at least a part of one or more hash values output as a result of execution of the program, and outputs, by using at least the part of the stored hash value, the analysis support information that makes the set with the hash value.

A system may include a graphics processing unit (GPU) and a processor. The GPU may include a GPU core and non-error-detection-and-correction (non-EDAC) graphics memory. The graphics memory may contain a data object and a copy of the data object. The processor may be configured to: instruct the GPU to handle the data object and the copy of the data object as textures; and instruct the GPU to execute a texture comparison shader program. The GPU core may be configured to: execute the texture comparison shader program; compare the data object and the copy of the data object; generate comparison results; and output the comparison results as pixels to an off-screen area of a framebuffer. The processor may further be configured to: obtain (a) a hash value of the off-screen area, or (b) the off-screen area; and determine whether the comparison results are at least one expected value.

The present disclosure provides a chip fault diagnosis method, which includes: determining an interrupt flag of an interrupt flag register based on first data identifying an interrupt state in the interrupt flag register; and determining a fault state of chip interrupt corresponding to the interrupt flag based on the interrupt flag. By adopting the technical solution provided by the present disclosure, a fault of the interrupt can be diagnosed in time, and the interrupt can be processed in time.

Some embodiments of the current disclosure disclose methods and systems for analyzing root causes of an incident disrupting information technology services such as cloud services. In some embodiments, a set of problem review board (PRB) documents including information about said incidents may be parsed using a natural language processing (NLP) neural model to extract structured PRB data from the unstructured investigative information contained in the PRB documents. The structured PRB data may include symptoms of the incident, root causes of the incident, resolutions of the incidents, etc., and a causal knowledge graph causally relating the symptoms, root causes, resolutions of the incidents may be generated.

A method includes, storing a set of valid codewords including: a first valid functional codeword representing a functional state of a controller subsystem; a first valid fault codeword representing a fault state of the controller subsystem and characterized by a minimum hamming distance from the first valid functional codeword; a second valid functional codeword representing a functional state of a controller; and a second valid fault codeword representing a fault state of the controller; in response to detecting functional operation of the controller subsystem, storing the first valid functional codeword in a first memory; in response to detecting a match between contents of the first memory and the first valid functional codeword, outputting the second valid functional codeword; in response to detecting a mismatch between contents of the first memory and every codeword in the first set of valid codewords, outputting the second valid fault codeword.

Systems and methods are provided for implementing soft model assertions (SMA) system and techniques designed to monitor and improve Machine Learning (ML) model quality by to detecting errors within the one or more ML models. SMA techniques and systems are distinctly designed to leverage: 1) a user's ability to specify features over data; and 2) large, existing datasets of organizations, in a manner that can improve the accuracy and quality of predicting potential errors in Machine Learning (ML) models. A SMA system can include a controller device receiving predictions generated based on the ML models and output from the SMA system. The controller performs autonomous operations of the system in response to determining that the one or more detected errors within the one or more ML models yield a high certainty of errors in the predictions. The SMA system also includes a domain specific language and a severity score module.

A computer implemented method comprises analysing data defining the first image which is displayable when a computer application runs to determine at least one candidate user interactive area in the image. A user interactive area is one which is responsive to user input when the computer application is run. The method comprises attempting to interact with the determined at least one candidate user interactive area and comparing the data defining the first image with data defining a further image to determine if the respective candidate user interactive area is an interactive area.

Systems and methods for detecting an anomaly in a power semiconductor device are disclosed. A system includes a server computing device and one or more local components communicatively coupled to the server computing device. Each local component includes sensors positioned adjacent to the power semiconductor device for sensing properties thereof. Each local component receives data corresponding to one or more sensed properties of the power semiconductor device from the sensors and transmits the data to the server computing device. The server computing device utilizes the data, via a machine learning algorithm, to generate a set of eigenvalues and associated eigenvectors and select a selected set of eigenvalues and associated eigenvectors. Each local component conducts a statistical analysis of the selected set of eigenvalues and associated eigenvectors to determine that the data is indicative of the anomaly.

Screen response validation of robot execution for robotic process automation (RPA) is disclosed. Whether text, screen changes, images, and/or other expected visual actions occur in an application executing on a computing system that an RPA robot is interacting with may be recognized. Where the robot has been typing may be determined and the physical position on the screen based on the current resolution of where one or more characters, images, windows, etc. appeared may be provided. The physical position of these elements, or the lack thereof, may allow determination of which field(s) the robot is typing in and what the associated application is for the purpose of validation that the application and computing system are responding as intended. When the expected screen changes do not occur, the robot can stop and throw an exception, go back and attempt the intended interaction again, restart the workflow, or take another suitable action.