Event records from multiple computing devices are received at a managing unit. Individual event records include an event identifier field including an event identifier identifying a first event associated with a particular computing device, a parent event identifier field identifying a parent event that initialized the first event, and an entity identifier field including an entity identifier identifying the particular computing device. The managing unit generates log records associated with event identifiers included in the event records. The log records include state fields indicating a state of a particular event associated with a particular event identifier. Based on a correlation of the event and log records, the managing unit determines at least two computing devices associated with events resulting in an error state, and identifies parent events that initialized the events with errors. The managing unit generates a report linking the parent events to the events having an error state.

An integrated circuit (IC) includes: a storage having a storage interface and addressable bytes, the storage interface coupled to first and second sets of peripheral terminals; control circuitry having control circuitry inputs and control circuitry outputs, the control circuitry inputs coupled to the storage interface and configured to receive configuration bits provided by the storage responsive to a control circuitry update trigger, and the control circuitry outputs coupled to first and second sets of peripheral outputs; and a cyclic-redundancy check (CRC) engine coupled to the storage interface, the CRC engine configured to distinguish between purposeful updates to the data in the storage and bit errors in the data in the storage.

Converting RAID data between persistent storage types, including: for each portion of a RAID shard of a RAID stripe: writing, to a respective plurality of source solid state drives, the portion of the RAID shard; detecting that all portions of the RAID shard have been successfully written; copying, from one of the plurality of source solid state drives to a respective target solid state drive among a plurality of target solid state drives from one of the plurality of source solid state drives, the RAID shard, where the RAID shard is copied from a source solid state drive that is different from where each other RAID shard of the RAID stripe is copied from.

Systems and methods for replacing and testing a data storage device are disclosed. In disclosed embodiments, a system including a data storage array (DSA) including a plurality of data storage devices (DSDs) in an enclosure. The system further includes an I/O server coupling the DSA to a client node and configured to provide data access between the client node and the DSA. The system further includes a management server coupled to the DSA, configured to detect a failed DSD in the DSA, detect a replacement DSD in the enclosure that replaces the failed DSD, and add the replacement DSD to a logical path of the DSA. The management server is further configured to display an indication of a state of the DSA based on the comparing.

Systems and methods for storing data are described. A system can comprise a controller, one or more physical non-volatile memory devices, a bus comprising a plurality of input/output (I/O) lines. The controller configured to receive data, encode the received data into a codeword, and transfer, in parallel, different portions of the codeword to different physical non-volatile memory devices among the plurality of physical non-volatile memory devices.

A semiconductor memory device includes a memory cell array, an error correction circuit, an error log register and a control logic circuit. The memory cell array includes a plurality of memory bank arrays and each of the memory bank arrays includes a plurality of pages. The control logic circuit is configured to control the error correction circuit to perform an ECC decoding sequentially on some of the pages designated at least one access address for detecting at least one bit error, in response to a first command received from a memory controller. The control logic circuit performs an error logging operation to write page error information into the error log register and the page error information includes a number of error occurrence on each of the some pages determined from the detecting.

A method for execution in a storage network, the method begins by determining a user device group content preference, wherein the user group content includes target content for a user device group and the determining includes predicting future target content for the user group. The method continues by selecting a plurality of network edge units for staging encoded data slices, identifying target content for partial download to the plurality of network edge units and dispersed error encoding the target content to generate a set of encoded data slices. The method then continues by identifying encoded data slices from the set of encoded data slices corresponding to the target content for partial download and determining a partial downloading schedule for sending the encoded data slices for partial download to each network edge unit of the plurality of network edge units. The method continues by facilitating partial downloading of the target content by sending the encoded data slices for partial download to each network edge unit of the plurality of network edge units.

A method for execution in a storage network, the method begins by determining a user device group content preference, wherein the user group content includes target content for a user device group and the determining includes predicting future target content for the user group. The method continues by selecting a plurality of network edge units for staging encoded data slices, identifying target content for partial download to the plurality of network edge units and dispersed error encoding the target content to generate a set of encoded data slices. The method then continues by identifying encoded data slices from the set of encoded data slices corresponding to the target content for partial download and determining a partial downloading schedule for sending the encoded data slices for partial download to each network edge unit of the plurality of network edge units. The method continues by facilitating partial downloading of the target content by sending the encoded data slices for partial download to each network edge unit of the plurality of network edge units.

A system-on-chip (SoC) can include a processor, a network controller configured to provide a network interface, and a memory controller configured to perform memory scrubbing. A memory patrol driver executing on the processor can initiate direct memory access (DMA) transfers to read successive portions of the memory by configuring corresponding DMA descriptors at a certain time interval. The network controller can perform each DMA transfer to read a corresponding portion of the memory, which can cause the memory controller to scrub the corresponding portion of the memory. The scrubbed data is sent to the network controller, which is discarded by the network controller.

A memory subsystem has multiple memory devices coupled to a command/address line and an error alert line, the error alert line delay-compensated to provide deterministic alert signal timing. The command/address line and the error alert line are connected between the memory devices and a memory controller that manages the memory devices. The command/address line is driven by the memory controller, and the error alert line is driven by the memory devices.