Patent classifications
G06F11/1497
PROCESSOR AND METHOD OF DETECTING SOFT ERROR FROM PROCESSOR
A processor includes an instruction pipeline that sequentially processes an original instruction and a duplicate instruction, which is generated by duplicating the original instruction. An original register file stores a result obtained by processing the original instruction in the instruction pipeline within a register of a n.sup.th index thereof. A duplicate register file stores a result obtained by processing the duplicate instruction in the instruction pipeline within a register of a n.sup.th index thereof. A comparing unit compares the register of the n.sup.th index in the original register file with the register of n.sup.th index in the duplicate register file and outputs an error detection signal, in response to a control signal.
Processing tasks in a processing system
A method of processing an input task in a processing system involves duplicating the input task so as to form a first task and a second task; allocating memory including a first block of memory configured to store read-write data to be accessed during the processing of the first task; a second block of memory configured to store a copy of the read-write data to be accessed during the processing of the second task; and a third block of memory configured to store read-only data to be accessed during the processing of both the first task and the second task; and processing the first task and the second task at processing logic of the processing system so as to, respectively, generate first and second outputs.
PROCESSOR AND METHOD OF DETECTING SOFT ERROR USING THE SAME
The method of detecting a soft error includes copying, in a program loaded into a memory, an original branch command to a copied branch command, executing, by a processor, a first command set comprising the copied branch command, executing, by a processor, a second command set comprising the original branch command, and determining, by a soft error detection circuit, whether an error exists in the execution of the original branch command based on the execution result of the first command set and the second command set.
DEVICE AND METHOD FOR COMPUTING DRIVING PARAMETERS
A computing device includes a first unit and a second unit. In response to receipt of a request corresponding to a computing function, the first unit may: determine an execution context; trigger a first execution of the function on the second unit, this delivering a first comparison parameter, a first temporal execution parameter being associated with the first comparison parameter; trigger a second execution of the function on the second unit, this delivering a second comparison parameter, a second temporal execution parameter being associated with the second comparison parameter; compare the first and second comparison parameters, a temporal comparison parameter being associated with the result of the comparison; and determine a computing status.
System and method for event-driven live migration of multi-process applications
A system, method, and computer readable medium for asynchronous live migration of applications between two or more servers. The computer readable medium includes computer-executable instructions for execution by a processing system. Primary applications runs on primary hosts and one or more replicated instances of each primary application run on one or more backup hosts. Asynchronous live migration is provided through a combination of process replication, logging, barrier synchronization, checkpointing, reliable messaging and message playback. The live migration is transparent to the application and requires no modification to the application, operating system, networking stack or libraries.
Fault tolerant processor for real-time systems
A fault tolerant multi-threaded processor uses the temporal and/or spatial separation of instructions running in two or more different threads. An instruction is fetched, decoded and executed by each of two or more threads to generate a result for each of the two or more threads. These results are then compared using comparison hardware logic and if there is a mismatch between the results obtained, then an error or event is raised. The comparison is performed on an instruction by instruction basis so that errors are identified (and hence can be resolved) quickly.
Information processing device and information processing method
An information processing device and information processing method with improved error tolerance are implemented. There is included a data processing unit that executes lockstep processing in which a plurality of processing systems executes the same task and error verification is performed by comparing execution results. In a case where an error is detected in the lockstep processing, the data processing unit increases supply voltage to a CPU circuit system that executes the task, processing of lowering a supply clock, or the like, as control for improving noise tolerance of the CPU circuit system, and moreover, performs re-execution processing of the task by using more processing systems than the processing systems before the error detection.
Buffer checker for task processing fault detection
A graphics processing system for operation with a data store, comprising: one or more processing units for processing tasks; a check unit operable to form a signature which is characteristic of an output from processing a task on a processing unit; and a fault detection unit operable to compare signatures formed at the check unit; wherein the graphics processing system is operable to process each task first and second times at the one or more processing units so as to, respectively, generate first and second processed outputs, the graphics processing system being configured to: write out the first processed output to the data store; read back the first processed output from the data store and form at the check unit a first signature which is characteristic of the first processed output as read back from the data store; form at the check unit a second signature which is characteristic of the second processed output; compare the first and second signatures at the fault detection unit; and raise a fault signal if the first and second signatures do not match.
System and method for event-driven live migration of multi-process applications
A system, method, and computer readable medium for asynchronous live migration of applications between two or more servers. The computer readable medium includes computer-executable instructions for execution by a processing system. Primary applications runs on primary hosts and one or more replicated instances of each primary application run on one or more backup hosts. Asynchronous live migration is provided through a combination of process replication, logging, barrier synchronization, checkpointing, reliable messaging and message playback. The live migration is transparent to the application and requires no modification to the application, operating system, networking stack or libraries.
RAILWAY SAFETY CRITICAL SYSTEMS WITH TASK REDUNDANCY AND ASYMMETRIC COMMUNICATIONS CAPABILITY
A railway safety critical application system substitutes commercial off-the-shelf (COTS) hardware and/or software for railway-domain specific product components yet is validated to conform to railway safety critical system failure-free standards. The safety critical system uses a pair of tasks executed on a controller of a COTS personal computer or within a virtual environment with asymmetric communications capability. Both tasks receive and verify safety critical systems input message data and security code integrity and separately generate output data responsive to the input message. The first task has sole capability to send complete safety critical system output messages, but only the second task has the capability of generating the output security code. A failure of any of systems hardware, software or processing capability results failure to transmit a safety critical system output message or an output message that cannot be verified by other safety critical systems.