Embodiments may include apparatus, systems, and methods associated with an Enhanced Serial Peripheral Interface (eSPI) channel interface to couple to a data bus to link an eSPI primary device to an eSPI secondary device. In embodiments, the eSPI primary device includes an eSPI device controller and is coupled to the channel interface and transmits a notification of a crash event, e.g., a catastrophic error (CATERR), via packet-based signaling, such as a virtual wire (VW) over the data bus to allow the eSPI primary device to transmit the notification of the crash event without allocation of a dedicated wire signal for the notification between the eSPI primary device and the eSPI secondary device. Other embodiments may be described and/or claimed.

An information handling system includes an embedded controller configured to transmit an error code to a pre-extensible firmware interface initialization module. A graphics font manager may generate a glyphs database during a boot process. If the error code is associated with a no power-on self-test, no video condition, then the pre-extensible firmware interface initialization module may retrieve information associated with the error code transmitted by the embedded controller, and locate the glyphs database generated by the graphics font manager from the non-volatile storage device.

This disclosure concerns a medical device designed for delivering a medical fluid or designed for controlling delivery of a medical fluid, and to a method of operating such a medical device. The medical device comprises a user interface associated with an electronic circuit connected to a first port and to a second port of a controller. The electronic circuit enables the controller to detect actuation of the user interface. The controller is configured to execute the following sequence of steps: first step: configure the first port as an output port and to apply a first signal to the first port; second step: to acquire a second signal from the second port; and third step: to determine on the basis of the second signal if a short circuit has occurred and to generate a short circuit alert signal if applicable.

A method for configuring a touch sensor system is provided. The method may be performed automatically by a controller of the system. The system comprises a touch panel operatively coupled to the controller, where the touch panel comprises a plurality of transmit electrodes and a plurality of receive electrodes. The method comprises selectively and individually driving, by the controller, at least one of the transmit electrodes. For each driven transmit electrode, signal outputs from one or more of the receive electrodes are received while the transmit electrode is driven. One or more characteristics of the touch panel is determined as a function of the signal outputs from the receive electrodes. At least one operation setting of the controller is configured based on the one or more characteristics. The one or more characteristics of the touch panel may include a number of transmit electrodes and a number of receive electrodes.

An electronic device can be configured to enable a host to indirectly control testing associated with the electronic device. The interface between the host and the electronic device can be abstract, such that the host does not have direct control over the electronic device. Examples of the electronic device include a memory device and a power management integrated circuit. The electronic device can allow the host to discover a quantity of tests supported by the electronic device and corresponding test descriptors. The electronic device can interact with the host to configure tests and/or reporting of test results.

Techniques for error detection involve injecting, to a switch of a storage system, information representing an error of at least one device to be tested of the system, such that the information representing the error is passed from an upstream port of the switch to a computing device connected with the switch, the switch being connected to the at least one device to be tested via a downstream port. The techniques further involve obtaining a handling result of the computing device on the information representing the error, and determining an error handling capability of the system at least partly by analyzing the handling result. Accordingly, slave storage devices of storage system nodes, connectors, the entire PCIe topology at the CPU level, and an NVMe bus can be tested, so that the entire logical path of the error handling can be tested, thereby improving performance and saving testing costs.

A display apparatus according to an example embodiment may include: a substrate including a display area and a non-display area outside the display area; a plurality of pixels in the display area; a plurality of touch electrodes overlapping with the pixels in the display area; a gate driving circuit in the non-display area and connected to the touch electrodes via at least one gate driving line; and a touch inspection circuit in the non-display area and connected to the touch electrodes through at least one touch line, the touch inspection circuit including at least one touch inspection switch and a touch inspection control switch.

The present application provides a touch control substrate, a test method thereof, and a manufacturing method of a touch control screen. The touch control substrate includes touch control electrodes, test terminals, and electrical connection members. Each of the test terminals is connected to two adjacent touch control electrodes. Each of the electrical connection members corresponds to each of the touch control electrodes. The touch control electrodes are electrically connected to the test terminals through the electrical connection members. The touch control electrodes form a series circuit through the corresponding electrical connection members and the corresponding test terminals.

A memory controller coupled to a memory device and configured to control access operations of the memory device includes a host interface and a microprocessor. The microprocessor is coupled to the host interface and configured to set a value of a predetermined parameter to a specific value after the memory controller powers up and start to perform a link flow to try to establish a transmission link via the host interface. The predetermined parameter is one of a plurality of capability parameters of the host interface and the predetermined parameter is related to reception of the host interface. After the link flow is completed, the microprocessor is further configured to identify an object device with which the host interface establishes the transmission link according to the specific value and at least one of a plurality of attribute parameters associated with the transmission link.

A system and method for identifying, analyzing, and repairing deviations in a power-on self-test routine (POST) of a computer system is disclosed. The computer system includes a basic input output system (BIOS) including a POST routine executed between power-on and hand off to an operating system. A memory stores a golden image POST code sequence. The controller and BIOS receive a sequence of POST codes from the execution of the POST routine. The sequence of POST codes is compared to the golden image POST code sequence. A deviation in the POST routine is identified based on at least one POST code of the sequence of the POST codes not matching the golden image POST code sequence. The identified deviation may be analyzed for further information in a message. The message may be used to recover from the deviation.