Methods, systems, and computer readable media for emulating virtualization resources are disclosed. According to one method, the method occurs at a computing platform. The method includes receiving a message associated with a device under test (DUT) and in response to receiving the message, performing an action associated with at least one of an emulated hypervisor and an emulated virtual machine (VM).

Method for monitoring errors when testing a control program (10) of a control device in a simulation environment (40), the control program (10) being executed by an emulator on a computer, the emulator assigning an extended range of items (50, 60, 70) to program variables of the control program (10), a variable value (52, 62, 72) allocated to a program variable being stored in the extended range of items (50, 60, 70), the emulator marking program variables as erroneous or non-erroneous, the marking being carried out on the basis of an assignment of non-erroneous program variables to a first category (K1) and of erroneous program variables to a second category (K2), the extended range of items (60) of each program variable in the second category (K2) having a data field (64), or the marking being carried out on the basis of an error field (76) stored in the extended range of items (70), a validity value being allocated to the error field (76) of a non-erroneous program variable and an error value being allocated to the error field (76) of an erroneous program variable, the extended range of items (70) of each program variable having a data field (74).

An aspect includes driving a plurality of commands to an interface unit of a circuit design in a hardware-accelerated simulator to dynamically initialize the circuit design to run one or more test cases based on an initialization sequence with breakpoint support. A state of the circuit design is examined through the interface unit based on triggering of a breakpoint on the hardware-accelerated simulator. A next action to perform in the initialization sequence is determined based on the state of the circuit design as determined through the interface unit.

A graphical tool generates test scenarios to be simulated on an integrated circuit. The tool provides for the assembly of a graphical flow chart that represents source code associated with test scenarios, which helps alleviate the need for manual coding and de-bugging.

A method for testing a technical system. The method includes: tests are carried out with the aid of a simulation of the system, the tests are evaluated with respect to a fulfillment measure of a quantitative requirement on the system and an error measure of the simulation, on the basis of the fulfillment measure and error measure, a classification of the tests as either reliable or unreliable is carried out.

A method is provided to get a high test coverage through a large number of test cases with a minimum number of test programs. Tests are performed flexibly in various environments, using parameters in multiple dimensions. The parameters can be dynamically extracted from the machine or simulator either by controlling scripts or by the test program itself. Multiple ways are offered to execute subsets of the test combinations.

A software emulation system for a gas delivery system of a substrate processing system includes an input/output bus and an emulator bus. An input/output bus adapter includes a switch configured to route data packets from a system controller for the substrate processing system to one of the input/output bus and the emulator bus. A gas delivery system emulator in communication with the emulator bus is configured to receive the data packets from the input/output bus adapter via the emulator bus and perform software-based emulation of a plurality of hardware components of the gas delivery system that are interconnected. The plurality of hardware components are modelled using one or more software models and include a gas source and at least one of a valve and a mass flow controller.

Examples of techniques for routing a representational state transfer (REST) request among a plurality of virtual processing systems are disclosed. In one example implementation according to aspects of the present disclosure, a computer-implemented method may include: receiving, at a load balancer, the REST request; assigning, by the load balancer, the REST request to one of a plurality of web servers, each of the plurality of web servers executing on a virtual processing system; routing, by the one of the plurality of web servers, the REST request to one of the plurality of virtual processing systems; and storing, by the one of the plurality of web servers, state information regarding the REST request to a data store.

A system is provided for determining causes of faults in a manufacturing system. The system stores data associated with a processing system which includes machines and associated processes, wherein the data includes timestamp information, machine status information, and product-batch information. The system determines, based on the data, a topology of the processing system, wherein the topology indicates flows of outputs between the machines as part of the processes. The system determines information of machine faults in association with the topology. The system generates, based on the machine-fault information, one or more fault parameters which indicates frequency and severity of a respective fault. The system constructs, based on the topology and the machine-fault information, a system model which includes the one or more fault parameters, thereby facilitating diagnosis of the processing system.

Testing a data coherency algorithm of a multi-processor environment. The testing includes implementing a global time incremented every processor cycle and used for timestamping; implementing a transactional execution flag representing a processor core guaranteeing the atomicity and coherency of the currently executed instructions; implementing a transactional footprint, which keeps the address of each cache line that was used by the processor core; implementing a reference model, which operates on every cache line and keeps a set of timestamps for every cache line; implementing a core observed timestamp representing a global timestamp, which is the oldest construction date of data used before; implementing interface events; and reporting an error whenever a transaction end event is detected and any cache line is found in the transactional footprint with an expiration date that is older than or equal to the core observed time.