An apparatus in one embodiment comprises a host device that includes at least one processor and an associated memory. The host device is configured to implement a plurality of processes each configured to access a shared region of the memory. The host device is further configured to establish a multi-process control group for the shared region, to maintain state information for the multi-process control group, and to track usage of the shared region by the processes based at least in part on the state information. At least a subset of the processes may comprise respective containers implemented utilizing operating system level virtualization of the processor of the host device. The multi-process control group established for the shared region illustratively comprises a coarse-grained control group having a granularity greater than a single page of the shared region.

A service management platform can implement functionality for one or more services, each of which can be independently used by a plurality of clients of the services. To activate the functionality of the one or more of the services, a hub server of the service management platform can assign a set of tasks to individual node servers for execution. The hub server can operate in a supervisor environment distinct from the processing environment used to execute the computationally intensive portions of the tasks. A task received at a node server can be managed by a supervisor process within the supervisor environment and executed by a native process within a native operating system environment, where the native process executes the computationally intensive calculations of the task and supervisor process provides communications and data transfer between the native process and rest of the service management platform.

A Data Storage Device (DSD) includes a memory for storing data, and a controller configured to execute firmware or code to perform a task. While performing the task, the controller is further configured to assign unique identifiers to respective firmware or code portions that are executed to perform the task, and create a list or data structure including the unique identifier assigned to the firmware or code portion that created the task. A unique identifier is added to the list or data structure for each firmware or code portion executed for the task. The list or data structure indicates the order in which the firmware or code portions are executed.

A system and method for determining and generating a visualization of processor utilization is described. The system accesses a source data set that indicates processor utilization rates of a plurality of servers over a plurality of sampling periods. The system defines a target data set that includes a plurality of processor utilization range buckets corresponding to the plurality of sampling periods. The system updates the target data set based on the source data set. A graphical user interface (GUI) is generated based on the updated target data set and includes a stacked area chart indicating percentages of samples corresponding to the processor utilization range buckets over time. The system distributes, based on the updated target data set, a load of from a first server to a second server based on the processor utilization range bucket of the first server and the processor utilization range bucket of the second server.

An apparatus and method are described for generating performance metrics of a processor. For example, one embodiment of a processor comprises: one or more simultaneous multithreading cores to simultaneously execute multiple instruction threads; a plurality of performance monitor counters, each to maintain a count of events occurring as a result of the execution of the multiple instruction threads; and a performance monitor unit to generate a plurality of performance metric values using the event counts stored in the performance monitor counters and in response to receipt of a request from software for the performance metric values.

A method of detecting congestion in a computer system. The computer system has a task source for generating a stream of computer-implemented tasks and a plurality of processing nodes arranged in a sequence and forming a processing pipeline for processing the stream of computer-implemented tasks, each one of the plurality of processing nodes having a respective system-unique identifier (SUID). The method is executable by the computer system. The method includes receiving a task packet by a given processing node, the task packet having a task body indicative of a respective computer-implemented task, and a writable congestion-indicating field; processing the task body of the task packet; determining a presence of an input queue of more than one task packet at the given processing node; and in response to the determining the presence of the input queue, updating the writable congestion-indicating field with the SUID of the given processing node.

An apparatus and method are described for generating performance metrics of a processor. For example, one embodiment of a processor comprises: one or more simultaneous multithreading cores to simultaneously execute multiple instruction threads; a plurality of performance monitor counters, each to maintain a count of events occurring as a result of the execution of the multiple instruction threads; and a performance monitor unit to generate a plurality of performance metric values using the event counts stored in the performance monitor counters and in response to receipt of a request from software for the performance metric values.

Systems and methods are described for implementing execution guarantees in an on-demand code execution system or other distributed code execution environment, such that the on-demand code execution system attempts to execute code only a desired number of times. The on-demand code execution system can utilize execution identifiers to distinguish between new and duplicative requests, and can decline to allocate computing resources for duplicative requests. The on-demand code execution system can further detect errors during execution, and rollback the execution to undo the execution's effects. The on-demand code execution system can then restart execution until the code has been execute the desired number of times.

Systems, methods, and computer-readable media for identifying and managing memory allocation for one or more threads are described. A computer system may detect that a threshold memory utilization has been met, and may determine an aggregate memory allocation for a thread. The aggregate memory allocation may be a difference between a first memory allocation for the thread at a first time that the threshold memory utilization was met and a second memory allocation for the thread at a second time that the threshold memory utilization was met. The computer device may provide an indication that the thread has met or exceeded a threshold memory allocation when the aggregate memory allocation is greater than or equal to the threshold memory allocation. The computer device may disable the thread when the aggregate memory allocation is greater than or equal to the threshold memory allocation. Other embodiments may be described and/or claimed.

Provided herein are systems and methods for multi-event correlation. Receiving a stream of events, each leaf rule engine may detect a plurality of events from the stream that matches a characteristic for the leaf rule engine. Each leaf rule engine may identify, from the plurality of events and within a time window, a group of events that satisfies a condition for the respective leaf rule engine. A root conditions engine may receive a stream of leaf events corresponding to the group of events identified by each leaf rule engine. The root conditions engine may identify, from the received stream of leaf events and within a root time window, a collection of events that satisfies a condition for the root conditions engine. A trigger may execute an action according to the collection of events identified within the root time window.