G06F11/3096

Systems, methods, and devices for vertically integrated instrumentation and trace reconstruction

In an embodiment, a system is configured to replay and/or reconstruct execution events and system states in real time or substantially in real time starting from the point when execution of a target program has stopped to the point when the user desires to step through the target program's execution in order to debug the software. In an embodiment, a system is configured to efficiently collect trace data that is sufficient to reconstruct the state of a computer system at any point of time from the start of execution to the time execution was stopped. Efficient and effective debugging of the software can be performed using embodiments of the disclosed methods, systems, and devices.

Control apparatus and reset method of control apparatus
11481226 · 2022-10-25 · ·

A first and a second control modules of a control apparatus of the present disclosure mutually monitor a state of the other end and send a reset request signal to a monitoring module when the other end should be reset. The monitoring module sends a reset signal to one of the first and second control modules when the monitoring module receives the reset request signal indicating that the one of the first and second control modules should be reset from the other and the monitoring module does not send the reset signal to the other. The monitoring module prohibits a reset of one of the first and second control modules when the monitoring module receives the reset request signal indicating that the one of the first and second control modules should be reset from the other and the monitoring module sends the reset signal to the other.

METHODS AND APPARATUS TO IMPROVE PERFORMANCE DATA COLLECTION OF A HIGH PERFORMANCE COMPUTING APPLICATION
20220334948 · 2022-10-20 ·

Methods, apparatus, systems and articles of manufacture to improve performance data collection are disclosed. An example apparatus includes a performance data comparator of a source node to collect the performance data of an application of the source node from the host fabric interface at a polling frequency; an interface to transmit a write back instruction to the host fabric interface, the write back instruction to cause data to be written to a memory address location of memory of the source node to trigger a wake up mode; and a frequency selector to: start the polling frequency to a first polling frequency for a sleep mode; and increase the polling frequency to a second polling frequency in response to the data in the memory address location identifying the wake mode.

Determining compression levels to apply for different logical chunks of collected system state information

An apparatus comprises a processing device configured to collect system state information from host devices, to split the collected system state information into logical chunks, and to determine, based at least in part on a plurality of factors, a compression level to be applied to each of the logical chunks. The plurality of factors comprise a first factor characterizing a time at which the collected system state information is needed at a destination device and at least a second factor characterizing resources available for at least one of performing compression of the collected system state information and transmitting the collected system state information over at least one network to the destination device. The processing device is further configured to apply the determined compression level to each of the logical chunks to generate compressed logical chunks, and to transmit the compressed logical chunks to the destination device.

Dynamically generated content understanding system

An item of content is received and it is analyzed to identify any different types of parsers that can be used to parse the item of content based on prior, user-selected parsers. One or more parsers is selected, based upon the content type in the item of content and based upon the prior, user-selected parsers. The selected parser is constructed in a server environment and is controlled to parse the item of content.

Autonomous transmit error detection of serial communication link receiver-transmitter and microcontroller system peripherals implementing the same
11620174 · 2023-04-04 · ·

A serial communication link receiver-transmitter with autonomous transmission error detection is described, and a communication peripherals including the same. Transmit data at a transmitter and transmitted data output by the transmitter and received by the receiver are observed by an error detector configured to generate an error indication in response to difference between the transmit data and corresponding observed transmit data of a transmitted data frame. If a difference is detected a transmit error indicator is asserted.

RESOURCE MONITORING FOR WEB APPLICATIONS WITH VIDEO AND ANIMATION CONTENT
20230142390 · 2023-05-11 ·

A computing device includes a processor to monitor usage of resources within the computing device. Responsive to the usage of resources being above a threshold, a determination is made that displayed content of a web page from an application includes video or animation content. A determination that the video or animation content is included as part of a background of the displayed content is based on a comparison of sizes between a display screen displaying the content of the web page and the video or animation content. Responsive to the determination that the background includes the video or animation content, the processor no longer plays the video or animation content to reduce resource usage by the application to display the web page.

On-die logic analyzer

An on-die logic analyzer (ODLA) can reduce the time and resources that would otherwise be spent in validating or debugging memory system timings. The ODLA can receive an enable signal with respect to a start command and start a count of clock cycles in response to a first issued command matching the start command defined in a first mode register. The ODLA can stop the count of clock cycles in response to a second issued command matching a stop command defined in a second mode register. The ODLA can write a value indicative of the stopped count to a third mode register or an on-die storage array in response to the stopped count exceeding a previously stored count.

CHARACTERIZATION PROFILES OF MEMORY DEVICES
20170357463 · 2017-12-14 ·

An example device in accordance with an aspect of the present disclosure includes a characterization engine and an allocation engine. The characterization engine is to receive information and characterizes expected temperature exposure of a memory device, to store a characterization profile of a plurality of memory devices of a computing system. The characterization engine is to refer to the characterization profile to identify the expected temperature exposure for a given memory device.

PERFORMANCE MONITORING IN A DISTRIBUTED STORAGE SYSTEM
20230188452 · 2023-06-15 · ·

Methods and systems for monitoring performance in a distributed storage system described. One example method includes identifying requests sent by clients to the distributed storage system, each request including request parameter values for request parameters; generating probe requests based on the identified requests, the probe requests including probe request parameter values for probe request parameter values, representing a statistical sample of the request parameters included in the identified requests; sending the generated probe requests to the distributed storage system over a network, wherein the distributed storage system is configured to perform preparations for servicing each probe request in response to receiving the probe request; receiving responses to the probe requests from the distributed storage system; and outputting at least one performance metric value measuring a current performance state of the distributed storage system based on the received responses.