Autonomous memory access (AMA) controllers and related systems, methods, and devices are disclosed. An AMA controller includes waveform circuitry configured to autonomously retrieve waveform data stored in a memory device and pre-process the waveform data without intervention from a processor. The AMA controller is configured to provide the pre-processed waveform data to one or more peripheral devices.

A memory system includes: a memory device suitable for storing data; a controller suitable for controlling the memory device; an interface suitable for communication between a host and the controller; a register suitable for storing a parameter value set associated with a waveform and a magnitude of a signal provided by the interface to the host, wherein the controller is suitable for: performing signal transmission operations for candidates of the parameter value set, storing a new parameter value set, which is determined based on the responses of the signal transmission operations, in the register, and controlling the interface to transfer a new signal having adjusted waveform and magnitude to the host based on the new parameter value set.

A method includes receiving a chip select signal at an SPI client device. The method also includes, responsive to receiving the chip select signal, transmitting a first bit of an SPI transmission to an SPI host device, where the first bit of the SPI transmission is transmitted with a delay based at least in part on a loop propagation delay of an SPI channel. The method includes receiving a clock signal at the SPI client device. The method also includes, responsive to receiving the clock signal, transmitting a second bit of the SPI transmission to the SPI host device.

The present disclosure provides a compute platform architecture for virtualized and cloud native network functions. The architecture uses a reduced instruction set computer-based general purpose processor along with multiple special purpose accelerators and an integrated network interface card. As such, the architecture can accommodate multiple hundreds of gigabits of input/output.

A system including a sensor interface for determining a substitute frequency value via a sensor interface is provided. The system can include a first circuit receiving a frequency signal. The system can also include a sensor interface coupled to the first circuit and configured to determine a substitute frequency value based on the frequency signal. The system can also include a second circuit providing the substitute frequency value output from the sensor interface. The second circuit can provide the substitute frequency value in place of an analog input value by mimicking the behavior of an analog-to-digital converter. An apparatus including the sensor interface and methods of determining the substitute frequency value using a sensor interface are also provided.

A method is disclosed for requesting data in a cloud gaming system that includes a cloud storage system and a cloud compute system, each of which has a respective peripheral component interconnect express (PCIe) interface and a respective computer memory. The cloud gaming system includes a PCIe switch connected to both the PCIe interface of the cloud storage system and the PCIe interface of the cloud compute system. The PCIe switch exposes a doorbell register that is monitored by the cloud storage system. The cloud compute system writes to the doorbell register, which causes an interrupt to fire on the cloud storage system. The cloud storage system handles the interrupt, which directs the cloud storage system to read a message from a specified computer memory location. The message directs the cloud storage system to read requested data from a storage device accessible by the cloud storage system.

An example apparatus is provided. The example apparatus includes a component controller. The example apparatus includes a memory storage device associated with the component controller to store volatile data from the component controller and to store non-volatile data from the component controller in separate blocks of memory. The volatile data and the non-volatile data are to operate the component controller. The example apparatus also includes a memory controller in communication with the component controller and the memory storage device to write the volatile data from the component controller to the memory storage device. In addition, the example apparatus includes a central processor in communication with the memory storage device. The central processor is to execute a firmware variable service. The central processor is to receive the non-volatile data from the component controller. The non-volatile data is to be written to the memory storage device by the firmware variable service.

A cloud gaming system includes a storage system and a compute system connected through a PCIe fabric. The compute system generates a command buffer for a read operation, writes the command buffer to compute system memory, and notifies the storage system about the command buffer. The storage system reads the command buffer in the compute system memory and processes the command buffer to read requested data. In one embodiment, the storage system writes the requested data in the compute system memory and notifies the compute system about the requested data in the compute system memory, and the compute system reads the requested data from its memory. In another embodiment, the storage system writes the requested data in the storage system memory and notifies the compute system about the requested data in the storage system memory, and the compute system reads the requested data from the storage system memory.

A network interface card with traffic shaping capabilities and methods of network traffic shaping with a network interface card are provided. The network interface card and method can shape traffic originating from one or more applications executing on a host network device. The applications can execute in a virtual machine or containerized computing environment. The network interface card and method can perform or include several traffic shaping mechanisms including, for example and without limitation, a delayed completion mechanism, a time-indexed data structure, a packet builder, and a memory manager.

Programmatic control of device I/O and EMF quiet mode, zone, signaling, and protocol are disclosed. Programmatic device I/O control reduces EMF radiation from a device with a device I/O controller application for programmatic control of the device's I/O channels. Responsive to firing of control rules, the device I/O application calls device APIs to control I/O channel settings. A quiet mode that reduces overall EMF radiation from a device is administered by an administrator and controls the device's wired or wireless I/O channels to create an EMF quiet zone in which some or all devices in a vicinity respond to a request to put themselves into an EMF quiet mode.