Patent classifications
G06F15/17
Vehicle safety electronic control system
A vehicle safety electronic control system (8) including a first microcontroller (11), a second microcontroller (12), and an inter-processor communication path (13) for bi-directional transfer of data between the microcontrollers (11,12). The system has a first mode of inter-processor communication in which the first microcontroller (11) acts as a master and the second microcontroller (12) acts as a slave, and a second mode of inter-processor communication in which the second microcontroller (12) acts as a master and the first microcontroller (11) acts as a slave. A mode selector (18-20) is provided to select and switch between the first and second modes.
Vehicle safety electronic control system
A vehicle safety electronic control system (8) including a first microcontroller (11), a second microcontroller (12), and an inter-processor communication path (13) for bi-directional transfer of data between the microcontrollers (11,12). The system has a first mode of inter-processor communication in which the first microcontroller (11) acts as a master and the second microcontroller (12) acts as a slave, and a second mode of inter-processor communication in which the second microcontroller (12) acts as a master and the first microcontroller (11) acts as a slave. A mode selector (18-20) is provided to select and switch between the first and second modes.
Multi-multidimensional computer architecture for big data applications
A data processing apparatus is provided comprising a front-end interface electronically coupled to a main processor. The front-end interface is configured to receive data stored in a repository, in particular an external storage and/or a network, determine whether the data is a single-access data or a multiple-access data by analyzing an access parameter designating the data, route the multiple-access data for processing by the main processor, and route the single-access data for pre-processing by the front-end interface and routing results of the pre-processing to the main processor.
Resource allocation in communications networks using probability forecasts
A system (1000) is disclosed including a resource allocation optimization (RAO) platform (1002) for optimizing the allocation of resources in network (1004) for delivery of assets to user equipment devices (UEDs) (1012). The RAO platform (1002) determines probabilities that certain asset delivery opportunities (ADOs) will occur within a selected time window and uses these probabilities together with information concerning values of asset delivery to determine an optimal use of asset deliveries. In this regard, the RAO platform (1004) received historical data from repository (1014) that facilitates calculation of probabilities that ADOs will occur. Such information may be compiled based on asset delivery records for similar network environments in the recent past or over time.
Locality-aware scheduling for NIC teaming
Some embodiments provide a method for distributing packets processed at multiple sockets across a team of network interface controllers (NICs) in a processing system. The method of some embodiments uses existing distribution (or selection) algorithms for distributing traffic across NICs of a NIC team (across several sockets), but augments the method to prioritize local NICs over remote NICs. When active NICs local to a socket associated with a packet are available, the method of some embodiments uses the selection algorithm to select from an array of the active local NICs. When active NICs local to the socket are not available, the method of some embodiments uses the selection algorithm to select from an array of the active NICs of other NICs on the NIC team.
Locality-aware scheduling for NIC teaming
Some embodiments provide a method for distributing packets processed at multiple sockets across a team of network interface controllers (NICs) in a processing system. The method of some embodiments uses existing distribution (or selection) algorithms for distributing traffic across NICs of a NIC team (across several sockets), but augments the method to prioritize local NICs over remote NICs. When active NICs local to a socket associated with a packet are available, the method of some embodiments uses the selection algorithm to select from an array of the active local NICs. When active NICs local to the socket are not available, the method of some embodiments uses the selection algorithm to select from an array of the active NICs of other NICs on the NIC team.
System and method for processing and arbitrating submission and completion queues
Systems and methods for processing and arbitrating submission and completion queues are disclosed. NVM Express (NVMe) implements a paired submission queue and completion queue mechanism, with host software on the host device placing commands into the submission queue. The memory device processes the commands through various phases including fetching, processing, posting a completion message, and sending an interrupt to the host. The memory device may process the commands based on the determined priority of the command. For example, the memory device may determine a priority for performing the phases after fetching the command. As another example, the memory device may perform the internal command selection based on a priority associated with the command. In this way, commands may be executed based on the priority needs of the memory device or of the host device.
Auto zero copy applied to a compute element within a systolic array
The present subject disclosure presents a hardware mechanism and usage model for using a compute element of a systolic array to handle messages from an RQ (Receive Queue) to SQ (Send Queue) without requiring a copy between queues and also minimizing the local processor's interaction with the send and receive queue hardware.
EFFICIENT VIRTUAL I/O ADDRESS TRANSLATION
A method includes using a network interface controller to monitor a transmit ring, wherein the transmit ring comprises a circular ring data structure that stores descriptors, wherein a descriptor describes data and comprises a guest bus address that provides a virtual memory location of the data. The method also includes using the network interface controller to determine that a descriptor has been written to the transmit ring. The method further includes using the network interface controller to attempt to retrieve a translation for the guest bus address. The method includes using the network interface controller to read the descriptor from the transmit ring.
EFFICIENT VIRTUAL I/O ADDRESS TRANSLATION
A method includes using a network interface controller to monitor a transmit ring, wherein the transmit ring comprises a circular ring data structure that stores descriptors, wherein a descriptor describes data and comprises a guest bus address that provides a virtual memory location of the data. The method also includes using the network interface controller to determine that a descriptor has been written to the transmit ring. The method further includes using the network interface controller to attempt to retrieve a translation for the guest bus address. The method includes using the network interface controller to read the descriptor from the transmit ring.