An application code hiding apparatus includes a secret code dividing part, a secret code caller generating part, a code analyzing part, a dummy code generating part, a code encrypting part, a code disposing part, a code decryptor generating part, a disposed code importer generating part, a code loader generating part, a memory inner code modifier generating part and a decrypted code caller generating part.

An application code hiding apparatus includes a secret code dividing part, a secret code caller generating part, a code analyzing part, a dummy code generating part, a code encrypting part, a code disposing part, a code decryptor generating part, a disposed code importer generating part, a code loader generating part, a memory inner code modifier generating part and a decrypted code caller generating part.

The present invention provides an apparatus for obfuscating and restoring a program execution code. The apparatus for restoring an obfuscated program execution code may include a memory loading a program execution code obfuscated so as not to be executed before restoration from a storage medium; a restoring unit, not allowing access by a third party who is not a user of the apparatus, restoring the obfuscated program execution code delivered from the memory and directly delivering it to a central processing unit (CPU); and a CPU executing the restored program execution code. Thus, since the execution code order which shows the same operation as the original program execution cannot be known even by a third party who achieved and analyzed a program execution code executed in a single equipment, it is not possible to analyze the algorithm, etc. through program execution code analysis, and it is not possible to execute the achieved execution code at a different equipment. Accordingly, intellectual property right can be protected.

The present invention provides an apparatus for obfuscating and restoring a program execution code. The apparatus for restoring an obfuscated program execution code may include a memory loading a program execution code obfuscated so as not to be executed before restoration from a storage medium; a restoring unit, not allowing access by a third party who is not a user of the apparatus, restoring the obfuscated program execution code delivered from the memory and directly delivering it to a central processing unit (CPU); and a CPU executing the restored program execution code. Thus, since the execution code order which shows the same operation as the original program execution cannot be known even by a third party who achieved and analyzed a program execution code executed in a single equipment, it is not possible to analyze the algorithm, etc. through program execution code analysis, and it is not possible to execute the achieved execution code at a different equipment. Accordingly, intellectual property right can be protected.

Described are technologies of all-digital camouflage circuits. The camouflage circuit can include a first chain of inverters, synthesized with a first standard cell with a first transistor threshold, and a second chain of inverters, synthesized with a second standard cell with a second transistor threshold that is different than the first transistor threshold. A first flip-flop receives a first output of the first chain as a data input and a second output of the second chain as a clock input. A second flip-flop receives the second output as a data input and the first output of the first chain as a clock input. Given the different transistor thresholds, one flip-flop always outputs an active signal that corresponds to an input signal applied to the first chain and the second chain. The other flip-flop always output a constant signal, such an always low signal.

Described are technologies of all-digital camouflage circuits. The camouflage circuit can include a first chain of inverters, synthesized with a first standard cell with a first transistor threshold, and a second chain of inverters, synthesized with a second standard cell with a second transistor threshold that is different than the first transistor threshold. A first flip-flop receives a first output of the first chain as a data input and a second output of the second chain as a clock input. A second flip-flop receives the second output as a data input and the first output of the first chain as a clock input. Given the different transistor thresholds, one flip-flop always outputs an active signal that corresponds to an input signal applied to the first chain and the second chain. The other flip-flop always output a constant signal, such an always low signal.

An identifying unit identifies, in a backdoor inspection device, a plurality of code blocks included in software to be inspected. An inspection unit executes backdoor inspection processing on the software to be inspected for the plurality of the code blocks that are identified by the identifying unit. An adjustment processing unit executes adjustment processing including obfuscation processing on the software to be inspected. A certificate generation unit generates a first certificate containing at least information on a result of the backdoor inspection processing. An output unit outputs the software to be inspected on which the adjustment processing has been performed together with the first certificate.

An identifying unit identifies, in a backdoor inspection device, a plurality of code blocks included in software to be inspected. An inspection unit executes backdoor inspection processing on the software to be inspected for the plurality of the code blocks that are identified by the identifying unit. An adjustment processing unit executes adjustment processing including obfuscation processing on the software to be inspected. A certificate generation unit generates a first certificate containing at least information on a result of the backdoor inspection processing. An output unit outputs the software to be inspected on which the adjustment processing has been performed together with the first certificate.

The apparatus disclosed herein, in various aspects, includes a digital asset, and an amulet that comprises an encrypted self-validating string. The amulet may be external to the digital asset. The apparatus may include a manager that cooperates securely with the digital asset and cooperates securely with the amulet to control access to the digital asset as specified by the amulet. In some aspects, the manager cooperates with the digital asset and with the amulet, at least in part, through shared memory in process space. In other aspects, the manager cooperates with the digital asset and with the amulet, at least in part, through a RAM drive in memory, the RAM drive at least partially hidden from an operating system of the computer. In yet other aspects, the manager cooperates with the digital asset and with the amulet, at least in part, through a virtual machine accessible only by said apparatus. The amulet, the manager, and the digital asset are either operably receivable by a computer or are operably received by the computer, in various aspects. Related methods and compositions of matter are also disclosed.

The apparatus disclosed herein, in various aspects, includes a digital asset, and an amulet that comprises an encrypted self-validating string. The amulet may be external to the digital asset. The apparatus may include a manager that cooperates securely with the digital asset and cooperates securely with the amulet to control access to the digital asset as specified by the amulet. In some aspects, the manager cooperates with the digital asset and with the amulet, at least in part, through shared memory in process space. In other aspects, the manager cooperates with the digital asset and with the amulet, at least in part, through a RAM drive in memory, the RAM drive at least partially hidden from an operating system of the computer. In yet other aspects, the manager cooperates with the digital asset and with the amulet, at least in part, through a virtual machine accessible only by said apparatus. The amulet, the manager, and the digital asset are either operably receivable by a computer or are operably received by the computer, in various aspects. Related methods and compositions of matter are also disclosed.