A system and method are disclosed for provisioning IP features in a system-on-chip. A plurality of identical chips are fabricated, each of which is capable of have a number of features enabled or disabled. As a default, all features are disabled. A production process is later carried out, in which the chip is installed in a greater device. During this process, the manufacturer requests a license the IP owner for enablement of various features. Using secure communications, a license is granted identifying the features to be enabled, and a volume of units permitted to be manufactured. The license information is encrypted using a key already known to the chip, and sent to the manufacturer. The chip receives the license information during provisioning, extracts relevant provisioning information using the key, and a secure processing system provisions the relevant features. Log information is generated to allow the IP owner to verify license compliance.

A system and method are disclosed for provisioning IP features in a system-on-chip. A plurality of identical chips are fabricated, each of which is capable of have a number of features enabled or disabled. As a default, all features are disabled. A production process is later carried out, in which the chip is installed in a greater device. During this process, the manufacturer requests a license the IP owner for enablement of various features. Using secure communications, a license is granted identifying the features to be enabled, and a volume of units permitted to be manufactured. The license information is encrypted using a key already known to the chip, and sent to the manufacturer. The chip receives the license information during provisioning, extracts relevant provisioning information using the key, and a secure processing system provisions the relevant features. Log information is generated to allow the IP owner to verify license compliance.

A microcontroller includes an event-detection circuit, a protection-control circuit, a digital-to-analog converter, a digital-to-analog conversion interface controller, a trigger-event controller, and a central processing unit. The event-detection circuit detects a sudden event, and correspondingly outputs an interrupt notification and a protection-enable signal. The protection-control circuit receives the protection-enable signal, and correspondingly outputs a protection-execution signal. The digital-to-analog conversion interface controller receives the protection-execution signal, stops updating the received input data, and stops outputting the acknowledgement signal. The trigger-event controller determines whether to set the conversion parameters of the digital-to-analog conversion interface controller according to the acknowledgement signal. The central processing unit determines and outputs the conversion parameters to the trigger-event controller, and receives the interrupt notification to eliminate the sudden event.

A microcontroller includes an event-detection circuit, a protection-control circuit, a digital-to-analog converter, a digital-to-analog conversion interface controller, a trigger-event controller, and a central processing unit. The event-detection circuit detects a sudden event, and correspondingly outputs an interrupt notification and a protection-enable signal. The protection-control circuit receives the protection-enable signal, and correspondingly outputs a protection-execution signal. The digital-to-analog conversion interface controller receives the protection-execution signal, stops updating the received input data, and stops outputting the acknowledgement signal. The trigger-event controller determines whether to set the conversion parameters of the digital-to-analog conversion interface controller according to the acknowledgement signal. The central processing unit determines and outputs the conversion parameters to the trigger-event controller, and receives the interrupt notification to eliminate the sudden event.

A method of assessing the security of an electronic device comprising software and hardware. The method includes: performing one or more security tests on the software; generating one or more software security metrics based on results of the one or more security tests performed on the software; performing one or more security tests on an integrated circuit hardware design for the hardware; generating one or more hardware security metrics based on results of the one or more security tests performed on the integrated circuit hardware design; and generating one or more electronic device security metrics based on the one or more hardware security metrics and the one or more software security metrics, the one or more electronic device security metrics providing a quantitative indication of the security of the electronic device

A method of assessing the security of an electronic device comprising software and hardware. The method includes: performing one or more security tests on the software; generating one or more software security metrics based on results of the one or more security tests performed on the software; performing one or more security tests on an integrated circuit hardware design for the hardware; generating one or more hardware security metrics based on results of the one or more security tests performed on the integrated circuit hardware design; and generating one or more electronic device security metrics based on the one or more hardware security metrics and the one or more software security metrics, the one or more electronic device security metrics providing a quantitative indication of the security of the electronic device

An apparatus, method, and system assess the trustworthiness of a design representation while maintaining its confidentiality and thwarting attempts at unauthorized access, misappropriation, and reverse engineering of confidential proprietary aspects of the design representation and/or its bit stream. A utility/tool is provided for trust assessment and verification of designs and/or bit streams. The utility/tool may be instantiated on a semiconductor device or implemented as a utility executable on a mobile computing device or other information processing system, apparatus, or network.

An apparatus, method, and system assess the trustworthiness of a design representation while maintaining its confidentiality and thwarting attempts at unauthorized access, misappropriation, and reverse engineering of confidential proprietary aspects of the design representation and/or its bit stream. A utility/tool is provided for trust assessment and verification of designs and/or bit streams. The utility/tool may be instantiated on a semiconductor device or implemented as a utility executable on a mobile computing device or other information processing system, apparatus, or network.

An embodiment integrated circuit includes a first electromagnetic pulse detection device that comprises a first loop antenna formed in an interconnection structure of the integrated circuit, a first end of the first antenna being connected to a first node of application of a power supply potential and a second end of the antenna being coupled to a second node of application of the power supply potential, and a first circuit connected to the second end of the first antenna and configured to output a first signal representative of a comparison of a first current in the first antenna with a first threshold.

An integrated circuit including an electronic fuse for supporting a secure bootstrap process, in which the fuse is queried. The circuit includes a protection against electromagnetic fault injection. The circuit is configured in such a way that the protection extends to the bootstrap process.