Patent classifications
G06F2211/104
DETECTING SINGLE EVENT UPSETS AND STUCK-AT FAULTS IN RAM-BASED DATA PATH CONTROLLERS
In one embodiment, a method includes receiving data including a plurality of data elements and creating a binary sequence having a plurality of bonus bits using a first binary sequence generator. A total length of the binary sequence is equal to or greater than a predetermined maximum burst size, and the first binary sequence generator is configured to produce the binary sequence to have less than a 0.1% chance of matching any sequence of bits in the data while in a data path. Moreover, the method includes providing a parity calculation using bits of each data element along with a bonus bit from the binary sequence to produce a corresponding parity bit for each data element and passing bursts of data that include the plurality of data elements along with a number of parity bits to an input of the data path.
PRECOMPUTED REDUNDANCY CODE MATRICES FOR HIGH-AVAILABILITY DATA STORAGE
Techniques described and suggested herein include systems and methods for precomputing regeneration information for data archives (archives) that have been processed and stored using redundancy coding techniques. For example, regeneration information, such as redundancy code-related matrices (such as inverted matrices based on, e.g., a generator matrix for the selected redundancy code) corresponding to subsets of the shards, is computed for each subset and, in some embodiments, stored for use in the event that one or more shards becomes unavailable, e.g., so as to more efficiently and/or quickly regenerate a replacement shard.
Detecting single event upsets and stuck-at faults in RAM-based data path controllers
In one embodiment, a system includes a processor and logic configured to receive data including a plurality of data elements, each data element having one or more bits, and pass each data element along with a corresponding parity bit to an input of a data path, a first binary sequence generator configured to create a binary sequence having a plurality of bonus bits, wherein a total length of the binary sequence is equal to or greater than a maximum burst size of the data, and a first parity module configured to provide a parity calculation using bits of each data element of the data with a bonus bit from the binary sequence to produce a parity bit for each data element. Other systems, methods, and computer program products for providing end-to-end parity generation and checking that the scheme provides coverage for both data and sequencing faults are also disclosed.
Storage controller cache synchronization method and apparatus
A storage controller is provided. The storage controller includes a memory storing an indication of a current owner, a previous owner, and a preferred owner for each of one or more logical volumes. The storage controller is configured to write protect the logical volumes where the current owner and the preferred owner is the storage controller and the previous owner of the logical volumes was a different storage controller. For the logical volumes where the storage controller is the preferred but not the current owner, the storage controller is set as the current and preferred owner of the logical volumes that the different storage controller was the current but not the preferred owner for, storage controller is set as the previous owner of the logical volumes that the storage controller is the current and preferred owner of, and allowing read and write access to the one or more logical volumes.
Detecting data requiring rebuilding in a dispersed storage network
A method begins with a processing module within a dispersed storage network (DSN) determining to perform a rebuild scanning function for a virtual memory vault, where the virtual memory vault has a DSN address range that is divided into multiple DSN address sub-ranges. The method continues with a first rebuild scanning agent module initiating a rebuilding scanning function for a first group of DSN address sub-ranges and processing first rebuild responses to produce a first list of encoded data slices for rebuilding. The method continues with a second rebuild scanning agent module initiating the rebuilding scanning function for a second group of DSN address sub-ranges and processing second rebuild responses to produce a second list of encoded data slices for rebuilding. The method continues with the processing module queuing the first and second lists of encoded data slices for rebuilding.
DATA STORAGE INTEGRITY VALIDATION
Embodiments of the present disclosure are directed to, among other things, validating the integrity of received and/or stored data payloads. In some examples, a storage service may perform a first partitioning of a data object into first partitions based at least in part on a first operation. The storage service may also verify the data object, by utilizing a verification algorithm, to generate a first verification value. In some cases, the storage service may additionally perform a second partitioning of the data object into second partitions based at least in part on a second operation. The second partitions may be different from the first partitions. Additionally, the archival data storage service may verify the data object using the verification algorithm to generate a second verification value. Further, the storage service may determine whether the second verification value equals the first verification value.
Rebuilding data slices in a storage network based on priority
A distributed storage integrity system in a dispersed storage network includes a scanning agent and a control unit. The scanning agent identifies an encoded data slice that requires rebuilding, wherein the encoded data slice is one of a plurality of encoded data slices generated from a data segment using an error encoding dispersal function. The control unit retrieves at least a number T of encoded data slices needed to reconstruct the data segment based on the error encoding dispersal function. The control unit is operable to reconstruct the data segment from at least the number T of the encoded data slices and generate a rebuilt encoded data slice from the reconstructed data segment. The scanning agent is located in a storage unit and the control unit is located in the storage unit or in a storage integrity processing unit, a dispersed storage processing unit or a dispersed storage managing unit.
RECONSTRUCTION OF DENSE TREE VOLUME METADATA STATE ACROSS CRASH RECOVERY
Embodiments herein are directed to efficient crash recovery of persistent metadata managed by a volume layer of a storage input/output (I/O) stack executing on one or more nodes of a cluster. Volume metadata managed by the volume layer is organized as a multi-level dense tree, wherein each level of the dense tree includes volume metadata entries for storing the volume metadata. When a level of the dense tree is full, the volume metadata entries of the level are merged with the next lower level of the dense tree. During a merge operation, two sets of generation IDs may be used in accordance with a double buffer arrangement: a first generation ID for the append buffer that is full (i.e., a merge staging buffer) and a second, incremented generation ID for the append buffer that accepts new volume metadata entries. Upon completion of the merge operation, the lower level (e.g., level 1) to which the merge is directed is assigned the generation ID of the merge staging buffer.
Apparatuses and methods for configurable ECC modes
Apparatuses, systems, and methods for an enhanced ECC mode. The memory array includes a number of data column planes and an extra column plane. When the memory device is set in an Enhanced ECC mode, data is stored in a subset of the data column planes, and an error correction code circuit (ECC) stores corresponding parity data in one of a column plane other than one of the subset of data column planes or the extra column plane. In this manner, memory may be capable of performing single error correction or single error correction with double error detection (SECDED) depending on the mode selected.
APPARATUSES AND METHODS FOR CONFIGURABLE ECC MODES
Apparatuses, systems, and methods for an enhanced ECC mode. The memory array includes a number of data column planes and an extra column plane. When the memory device is set in an Enhanced ECC mode, data is stored in a subset of the data column planes, and an error correction code circuit (ECC) stores corresponding parity data in one of a column plane other than one of the subset of data column planes or the extra column plane. In this manner, memory may be capable of performing single error correction or single error correction with double error detection (SECDED) depending on the mode selected.