In one example, a method includes receiving metadata in the form of a modification to metadata represented by a file system namespace abstraction, wherein the file system namespace abstraction corresponds to less than an entire file system namespace, and the file system namespace abstraction includes one or more pages, and one of the pages corresponds to a particular cached block, updating the file system namespace abstraction based on the received metadata, determining if caching is enabled for the file system namespace abstraction, when caching is enabled for the file system namespace abstraction, caching the updated file system namespace abstraction in SSD storage that includes the cached block, and maintaining a status of the cached block in a Dtable of the SSD storage.

Embodiments of the present disclosure may relate to a data storage controller that may include a host interface to receive a request from a host to perform a data copy operation on a non-volatile data storage component of a data storage device, where the request identifies one or more source ranges of the non-volatile data storage component from which data is to be copied, a destination range of the non-volatile data storage component to which the data is to be copied, and a transfer length in bytes for each of the one or more source ranges, and a processor coupled with the host interface to process the request from the host to perform the data copy operation to copy the data from the one or more source ranges to the destination range based at least in part on the transfer length in bytes. Other embodiments may be described and/or claimed.

In one example, a method includes receiving metadata in the form of a modification to metadata represented by a file system namespace abstraction, and the file system namespace abstraction corresponds to less than the entire file system namespace. Next, the file system namespace abstraction is updated based on the received metadata. Next, a determination is made whether or not caching is enabled for the file system namespace abstraction. If caching is enabled for the file system namespace abstraction, the updated file system namespace abstraction is cached in SSD storage.

Provided are techniques for handling cache and Non-Volatile Storage (NVS) out of sync writes. At an end of a write for a cache track of a cache node, a cache node uses cache write statistics for the cache track of the cache node and Non-Volatile Storage (NVS) write statistics for a corresponding NVS track of an NVS node to determine that writes to the cache track and to the corresponding NVS track are out of sync. The cache node sets an out of sync indicator in a cache data control block for the cache track. The cache node sends a message to the NVS node to set an out of sync indicator in an NVS data control block for the corresponding NVS track. The cache node sets the cache track as pinned non-retryable due to the write being out of sync and reports possible data loss to error logs.

The present disclosure relates to a memory hierarchy for a system-in-package. An example memory hierarchy is connectable to a processor via a memory management unit arranged for translating a virtual address sent by the processor into a physical address. The memory hierarchy has a data cache memory and a memory structure having at least a L1 memory array comprising at least one cluster. The memory structure comprises a first data access controller arranged for managing one or more banks of scratchpad memory of at least one of the clusters of at least the L1 memory array, comprising a data port for receiving at least one physical address and arranged for checking at run-time, for each received physical address, bits of the physical address to see if the physical address is present in the one or more banks of the at least one cluster of at least the L1 memory array.

The present disclosure includes memory having a static cache and a dynamic cache. A number of embodiments include a memory, wherein the memory includes a first portion configured to operate as a static single level cell (SLC) cache and a second portion configured to operate as a dynamic SLC cache when the entire first portion of the memory has data stored therein.

A memory access method is applied to a computer system including a hybrid memory. The hybrid memory includes a first memory and a second memory. According to the method, after receiving a first access request including a first virtual address, the first virtual address is translated into a first physical address, where the first physical address is a physical address of a first large page in the first memory, and the first large page includes a plurality of small pages. When it is determined that data of a first small page in the first large page is migrated to the second memory, accessing the second memory according to a second physical address stored in the first small page, where the second physical address is a physical address of a second small page in the second memory, the second small page stores the data migrated from the first small page.

Provided are techniques for handling cache and Non-Volatile Storage (NVS) out of sync writes. At an end of a write for a cache track of a cache node, a cache node uses cache write statistics for the cache track of the cache node and Non-Volatile Storage (NVS) write statistics for a corresponding NVS track of an NVS node to determine that writes to the cache track and to the corresponding NVS track are out of sync. The cache node sets an out of sync indicator in a cache data control block for the cache track. The cache node sends a message to the NVS node to set an out of sync indicator in an NVS data control block for the corresponding NVS track. The cache node sets the cache track as pinned non-retryable due to the write being out of sync and reports possible data loss to error logs.

Implementations relate to a data processor that includes a data processing unit having a plurality of processing elements and a cache hierarchy including a plurality of levels of data caches. The data caches include a first level data cache connected to a second level data cache, and a main memory connected to the highest level cache of the cache hierarchy. At least one of the first level data cache or second level data cache is divided into a plurality of cache segments, and during operation of the data processor, at least some of the plurality of cache segments are excluded from cache operation. Each of the excluded cache segments is dedicated to an associated processing element as tightly coupled local access memory.

Examples may include techniques to monitor processing of I/O requests of an application being executed by a computing platform by collecting a trace of the I/O requests, the trace including an I/O class of each I/O request; replay the trace and automatically analyze possible cache configuration policies for using a cache during execution of the application by the computing platform; and determine an optimal cache configuration policy for the cache from the possible cache configuration policies. The optimal cache configuration policy may then be applied to use of the cache during subsequent execution of the application by the computing platform.