Disclosed herein is a computer-implemented method for storing Merkle tree data in memory. The Merkle tree data comprising uncle node data, first nephew node data and second nephew node data. The computer implemented method comprises determining a first nephew node memory address, determining a second nephew node memory address, storing the uncle node data at the uncle node memory address, storing the first nephew node data at the first nephew node memory address, and storing the second nephew node data at the second nephew node memory address. The first nephew node memory address is less than the uncle node memory address and the second nephew node memory address is greater than the uncle node memory address, or the first nephew node memory address is greater than the uncle node memory address and the second nephew node memory address is less than the uncle node memory address.

A storage device includes an accelerator including a first processor, and a storage controller that uses a buffer memory as a working memory and includes a second processor different in type from the first processor. The second processor is configured to establish a first communication path between the first processor and the buffer memory responsive to a request of the first processor, and the first processor is configured to access the buffer memory through the first communication path.

Utilizing a storage replica data structure includes receiving, at a hyper-kernel running on a computing node in a plurality of interconnected computing nodes, an indication of an operation pertaining to at least one of a guest physical memory address or a stable storage address. A guest operating system is run on a virtual environment that is defined by a set of hyper-kernels running on the plurality of interconnected computing nodes. It further includes updating a storage replica data structure. The storage replica data structure comprises a set of entries. The set of entries in the storage replica data structure comprises associations among guest physical memory addresses, physical memory addresses, and stable storage addresses

A computer-executable method, system, and computer program product for managing a data storage system using a distributed write-through cache, wherein the data storage system comprises a first node, a second node, and a data storage array, wherein the first node includes a first cache and the second node includes a second cache, the computer-executable method, system, and computer program product comprising providing cache coherency on the data storage system by synchronizing the second cache with the first cache based on I/O requests received at the first node.

A memory device includes a page cache comprising a cache register, a memory array configured with a plurality of memory planes, and control logic, operatively coupled with the memory array. The control logic receives, from a requestor, a cache release command indicating that data associated with a first subset of the plurality of memory planes and pertaining to a previous read command was received by the requestor. Responsive to the cache release command, the control logic returns to the requestor, data from the cache register and associated with a second subset of the plurality of memory planes and pertaining to the previous read command, while concurrently copying data associated with the first subset of the plurality of memory planes and pertaining to a subsequent read command into the cache register.

A device includes: a cache memory configured to store a first list and a second list, and a processor. The first list includes one or more entries that include any one of data pieces in a storage device and information indicating a location of the data piece on the storage device, and the second list includes one or more entries that include information indicating a location of an already discarded data piece on the storage device, the already discarded data piece having been included in an entry that has been evicted from the first list. The processor counts a count number of entries including data pieces updated and being consecutive from an eviction target entry when updating data piece of an entry in the first list, and writes data of a target entry in the storage device and discards the data from the cache memory based on a certain rule.

Utilizing a storage replica data structure includes receiving, at a hyper-kernel running on a computing node in a plurality of interconnected computing nodes, an indication of an operation pertaining to at least one of a guest physical memory address or a stable storage address. A guest operating system is run on a virtual environment that is defined by a set of hyper-kernels running on the plurality of interconnected computing nodes. It further includes updating a storage replica data structure. The storage replica data structure comprises a set of entries. The set of entries in the storage replica data structure comprises associations among guest physical memory addresses, physical memory addresses, and stable storage addresses.

A technique performs data reduction on host data of a write request during ingest under certain circumstances. Therein, raw host data of a write request is placed from the host into a data cache. Further, a data reducing ingest operation is performed that reduces the raw host data from the data cache into reduced host data (e.g., via deduplication, compression, combinations thereof, etc.). After completion of the data reducing ingest operation, a late-binding operation is performed that updates a mapper with ability to access the reduced host data from secondary storage. Such ingest-time data reduction may be enabled/disabled (e.g., turned on or off) per input/output (I/O) operation (e.g., used only for relatively large asynchronous I/O operations) and/or activated in situations in which the ingest bandwidth is becoming a bottleneck.

A data storage system can optimize deterministic window operation of a data storage system where a host is connected to a data storage device via a system module having at least two controller inputs. A data access request can be stored in a first cache by the system module prior to analyzing an operational parameter of the system and generating a cache strategy that is directed to optimizing execution of the data access request with the two controller inputs during a deterministic window between the host and data storage device. The data of the data access request can be proactively moved to a second cache in accordance with the cache strategy to optimize the deterministic window performance.

Systems and methods are provided for expanding the available memory of a storage controller. The systems and methods utilize a PCIe memory controller connected to the backend interface of the storage controller. Memory of the PCIe memory controller is memory mapped to controller memory of the storage controller. The PCIe connection allows the storage controller to access the memory of the PCIe memory controller with latencies similar to that of the controller memory.