A sensing device includes a MEMS sensor and an adjustable amplifier. The MEMS sensor is configured to generate an input signal according to environmental changes. The adjustable amplifier has a first input terminal, a second input terminal, a third input terminal, a fourth input terminal and a first output terminal. The first input terminal is electrically connected to the MEMS sensor for receiving the input signal. The second input terminal is electrically connected to a first signal terminal for receiving a first common-mode signal. The third input terminal is electrically connected to the first output terminal. The fourth input terminal is electrically connected to a second signal terminal. An electric potential of a first output signal output by the first output terminal of the adjustable amplifier is related to electric potentials of the input signal, the first signal terminal and the second signal terminal.

A sensing device includes a MEMS sensor and an adjustable amplifier. The MEMS sensor is configured to generate an input signal according to environmental changes. The adjustable amplifier has a first input terminal, a second input terminal, a third input terminal, a fourth input terminal and a first output terminal. The first input terminal is electrically connected to the MEMS sensor for receiving the input signal. The second input terminal is electrically connected to a first signal terminal for receiving a first common-mode signal. The third input terminal is electrically connected to the first output terminal. The fourth input terminal is electrically connected to a second signal terminal. An electric potential of a first output signal output by the first output terminal of the adjustable amplifier is related to electric potentials of the input signal, the first signal terminal and the second signal terminal.

A scalable Ising machine system comprises a plurality of chips, each chip comprising a plurality of N nodes, each node comprising a capacitor, a positive terminal, and a negative terminal, a plurality of NM connection units, arranged in N rows and M columns, each connection unit comprising a set of reconfigurable resistive connections, each connection unit configurable to connect a pair of the N nodes via the reconfigurable resistive connections, and a plurality of interconnects, wherein each chip of the plurality of chips is communicatively connected all other chips of the plurality of chips via at least one interconnect. A method of calculating a Hamiltonian of a system of coupled spins is also disclosed.

A reconfigurable integrator/differentiator circuit includes: a first input terminal; a first output terminal; a first current follower having a second input terminal, a second inverting output terminal providing feedback to the first input terminal, a third non-inverting output terminal being connected to the first output terminal, and a fourth inverting output terminal; a second current follower having a third input terminal, a fifth inverting output terminal providing feedback to the first output terminal, and a sixth non-inverting output terminal being connected to the first input terminal; a single capacitor being connected between the fourth inverting output terminal and ground; a first resistor being connected between the first input terminal and the second input terminal; and a second resistor being connected between the fourth inverting output terminal and the third input terminal.

A reconfigurable integrator/differentiator circuit includes: a first input terminal; a first output terminal; a first current follower having a second input terminal, a second inverting output terminal providing feedback to the first input terminal, a third non-inverting output terminal being connected to the first output terminal, and a fourth inverting output terminal; a second current follower having a third input terminal, a fifth inverting output terminal providing feedback to the first output terminal, and a sixth non-inverting output terminal being connected to the first input terminal; a single capacitor being connected between the fourth inverting output terminal and ground; a first resistor being connected between the first input terminal and the second input terminal; and a second resistor being connected between the fourth inverting output terminal and the third input terminal.