A pixel circuit for driving a light-emitting diode (LED) comprises a current-mirror, comprising a primary current path and a secondary current path, arranged to mirror a current through the primary current path to the secondary current path. The current through the primary current path is settable by switching a reference current into the primary current path through a reference current line. The secondary current path is configured to drive the LED. The pixel circuit also includes a switch component arranged to switch the LED to and from the secondary current path based on one or more switch control lines.

A micro-LED display having a plurality of pixels arranged in a two-dimensional matrix, wherein an individual pixel of the plurality of pixels each includes a light-emission section and a drive circuit to drive the light-emission section. The drive section includes an in-pixel PWM circuitry to receive a sawtooth or triangular pulse and an electric potential based on an image signal voltage, and to output a current pulse based on a comparison of the sawtooth or triangular pulse and the electric potential. The in-pixel PWM circuitry includes at most 7 transistors. The micro-LED display includes is coupled to one or more circuitries coupled to the plurality of pixels to provide the sawtooth or triangular pulse and the electric potential.

An electronic device and method are disclosed. The electronic device includes a housing, a flexible display having a variable display area including: a visible first region, and a second region that is stowable/extendable, a display driver integrated circuit (DDI), and a processor. The processor implements the method, including: when the housing is disposed in a first state in which the second region is stowed, control the flexible display to display a user interface (UI) screen through the first region based on a first driving frequency and a first light emission frequency, control the flexible display to display a compensation image through the second region based on a second driving frequency and a second light emission frequency, wherein the second driving frequency is equal to or less than the first driving frequency, and the second light emission frequency is less than the first light emission frequency.

A display device includes a pixel including light-emitting elements in which light emission luminance during a predetermined period is controlled by controlling a lighting period among the predetermined period, and light-emitting elements in which light emission luminance is controlled by controlling a current value.

A method and a device for driving a pixel circuit, and a storage medium are provided. When a current data voltage of a pixel circuit is within a first voltage range and a target data voltage of the pixel circuit is within a second voltage range, the driving method comprises: refreshing a data voltage stored in the pixel circuit with a boundary value between the first voltage range and the second voltage range using a gate signal reference voltage corresponding to the first voltage range; and refreshing the data voltage stored in the pixel circuit with the target data voltage using a gate signal reference voltage corresponding to the second voltage range.

A display control method includes: obtaining a delay instruction from a processor, in which the delay instruction includes a delay duration required to display a current image frame; determining a plurality of control pulses required to display the current image frame according to the delay duration, in which duty cycles of the plurality of the control pulses are identical; and when a synchronization signal is received, generating each of the plurality of the control pulses sequentially, in which the control pulse is configured to control an active-matrix organic light-emitting diode (AMOLED) display for dimming and displaying.

Mixed clock domain signaling and, more particularly, mixed clock domain signaling for light-emitting diode (LED) packages arranged for cascade communication is disclosed. Mixed clock domain signaling involves digital communication where time-positions of bit pulse edges in a communication channel are derived from multiple uncorrelated clock domains, including an original clock domain from a master controller and a local clock domain. In the context of LED displays, serial strings of LED packages are arranged as LED pixels to receive cascade communication signals, and the original clock domain is derived from a master controller and a local clock domain is derived at each LED package. By providing for the bit period to be maintained and correlated to the original clock domain throughout the repeated cascade communication, problems associated with multiple uncorrelated clock domains in the communication channel, such as sampling jitter, may be averted, thus avoiding loss of data integrity.

An array substrate including a plurality of pixel units arranged in a matrix is provided. Each pixel unit at least includes a first sub-pixel, a second sub-pixel and a third sub-pixel that emit light of different colors, the first sub-pixel has a lower luminous efficiency than the second and third sub-pixels. The array substrate further comprises a plurality of first gate lines and a plurality of second gate lines that correspond to respective rows of pixel units of the plurality of pixel units. The first sub-pixel in each row of pixel units of the plurality of pixel units is coupled to a first gate line of the plurality of first gate lines, and the second sub-pixel and the third sub-pixel in the row of pixel units of the plurality of pixel units are both coupled to a second gate line of the plurality of second gate lines.

Described examples include a process that includes illuminating a spatial light modulator at a first illumination level during a first bit-plane and stopping illumination at a beginning of a second bit-plane subsequent to the first bit-plane. The process also includes resuming illumination after a settling period of the spatial light modulator at a second illumination level for a time period such that a total illumination energy during the second bit-plane is equivalent to an intended illumination energy for the second bit-plane at the first illumination level and stopping illumination at the second illumination level before a subsequent third bit-plane.

The present invention includes first to j-th DA conversion circuits that are fixedly coupled to one of a plurality of gradation reference voltage generating circuits steadily generating respective gradation reference voltage groups according to gamma correction characteristics of color components different from one another, and select a gradation reference voltage corresponding to a pixel data piece among the gradation reference voltage group generated by the one of gradation reference voltage generating circuits to output the gradation reference voltage as a gradation voltage, an output unit that assigns the first to j-th gradation voltages to respective first to j-th driving voltage signals in a mode according to an output switching signal, and outputs the first to j-th driving voltage signals to the display panel, and an output control unit that generates the output switching signal to switch modes of assigning the first to j-th gradation voltages to the first to j-th driving voltage signals at every division period obtained by dividing a horizontal scanning period by a division number indicated by a division number setting signal, and outputs an input switching signal that causes the first to j-th driving voltage signals to be input in turn to the respective data lines as many as the division number at a cycle of the division periods for the respective first to j-th driving voltage signals.