The present application relates to a driving circuit for display panel, comprising a compensation module and a driving module. The compensation module generates a first compensation signal according to variation of a first displaying characteristic of a first image in a frame time. The driving module generates a first driving signal according to the first compensation signal for driving the display panel to display the first image in a first frame time. By avoiding excessive variation of displaying characteristics of the first image with time, the displaying quality may be improved. In addition, the compensation module generates a second compensation signal according to the difference between the first displaying characteristic of the first image and a second displaying characteristic of a second image. The driving module drives the display panel to display the second image in a second frame time according to the second compensation signal. Accordingly, the influence on displaying quality owing to excessive difference in displaying characteristics between the first image displayed in the first frame time and the second image displayed in the second frame time may be avoided.

Method, apparatuses, and systems are described to display image data to a sub-pixel within a micro-LED (mLED) display. A sub-pixel image data value is stored at the sub-pixel. The sub-pixel is turned to an ON state. A shared row counter value is provided to the sub-pixel. The shared row counter value and the sub-pixel image data value are compared at the sub-pixel. The sub-pixel is turned to an OFF state if the shared row counter value is equal to or greater than the sub-pixel image data value.

A lighting device is disclosed that includes a plurality of light emitting diodes arranged in an array, a plurality of trenches disposed between and optically isolating the light emitting diodes, and a patterned converter layer disposed over an array surface formed by light emitting surfaces of the light emitting diodes and upper surfaces of the trenches, the patterned converter layers including a first region having a first converter and a second region having a second converter different from the first converter, the first region and second region disposed over different areas of the array surface.

Provided are a driver chip, a display screen and a display device. The driver chip is configured to drive a silicon-based display screen, and the driver chip is composed of a bridge chip and a screen driver chip. A signal interface circuit of a first signal processing circuit in the bridge chip receives video signals of each frame of picture. A drive controller controls video signals of P pixels among the video signals of one frame of picture to be output at a first preset transmission speed to a second signal processing circuit of the screen driver chip each time. A signal processor of the second signal processing circuit in the screen driver chip converts the video signals of all of the P pixels into data drive signals and outputs at a second preset transmission speed data drive signals of Q pixels in one frame of picture to a data processing circuit each time. The data processing circuit is configured to convert the data drive signals into display driving signals, sequentially output the display driving signals to pixels in each row, and control each pixel.

A display device include a substrate on which a plurality of first sub-pixels disposed in first columns and a plurality of second sub-pixels disposed in second columns are defined; a plurality of data lines disposed on one sides of the plurality of first sub-pixels and the other sides of the plurality of second sub-pixels; and a plurality of parking voltage lines disposed between the plurality of first sub-pixels and the plurality of second sub-pixels, wherein the plurality of parking voltage lines are configured to be electrically connected to some of the plurality of data lines. Accordingly, by applying the same parking voltage to the parking voltage lines and the data lines during a blank frame, flicker can be reduced.

A display substrate, a driving method thereof, and a display device. The display substrate includes: a first display sub-region including a plurality of first repeating regions each including a first pixel unit and a second pixel unit disposed adjacently, the first pixel unit including a first sub-pixel and a second sub-pixel, and the second pixel unit including a second sub-pixel and a third sub-pixel; and a second display sub-region including a plurality of second repeating regions each including a third pixel unit and a first transparent pixel, the third pixel unit including a first sub-pixel, a second sub-pixel and a third sub-pixel; the first transparent pixel is configured such that a pixel density of the second display sub-region is less than a pixel density of the first display sub-region, and a light transmittance of the second display sub-region is greater than a light transmittance of the first display sub-region.

An input signal correction device includes an input circuit, extension circuit, degenerate circuit, separation circuit, recovery circuit and delay adjustment circuit that operate at an operating frequency f, demura circuit that operates at an operating frequency f/2, and adder circuit. The extension circuit extends the period of R and B input signals by a factor of 2 and outputs preprocessing signals, the degenerate circuit degenerates a G input signal, the demura circuit corrects preprocessing signals from the extension and degenerate circuits and outputs correction signals, the separation circuit reduces the period of the R and B correction signals to ½ and outputs differential signals, recovery circuit reduces the period of G correction signal to ½ and outputs the same differential signal over two periods, the delay adjustment circuit delays the input and output signals, and the adder circuit adds the differential signals to the delay signals and outputs output signals.

The present disclosure relates to an array substrate and a display device. The array substrate includes a plurality of initialization signal lines and a plurality of connection lines. The initialization signal lines are arranged in a conductive layer, extend along a first direction and are arranged at intervals along a second direction, and are used to provide initialization signals to the sub-pixels. The connection lines are arranged in another conductive layer, extend along the second direction and are arranged at intervals along the first direction. Projections of at least one initialization signal line and at least one connection line on the base substrate intersect, and the at least one initialization signal line and the at least one connection line are connected through a via hole, so that the projections of the initialization signal lines and the connection lines on the substrate form a grid-like structure.

A display apparatus includes a display panel, a memory, and a driver. The memory stores at least one set of correspondences, and each set of correspondences includes 2.sup.N grayscale data and 2.sup.N register values in a one-to-one correspondence with the 2.sup.N grayscale data; each register value represents a grayscale voltage value of corresponding grayscale data; and N is a positive integer greater than or equal to 6. The driver obtains the at least one set of correspondences from the memory; receives image data from a signal transmission interface, the image data including a plurality of grayscale data corresponding to a plurality of sub-pixels; for any grayscale data in the image data, obtains a register value corresponding to the grayscale data in a set of correspondences; and outputs a grayscale voltage corresponding to a grayscale voltage value to the display panel according to the register value.

A display device includes a data compensator to generate output image data by adding an extension bit to input image data received from an external processor, a data driver to supply a data voltage corresponding to the output image data to each of data lines, and a pixel unit including a plurality of sub-pixels. A first data line for providing a first color data signal is connected to a first sub-pixel disposed in an odd-numbered pixel row through a first anode, and is connected to a second sub-pixel disposed in an even-numbered pixel row through a second anode having a different size than the first anode, and the data compensator is configured to add a first extension bit to the input image data corresponding to the first sub-pixel and add a second extension bit to the input image data corresponding to the second sub-pixel.