According to an aspect of the present disclosure, there is provided a display device including a plurality of unit pixels comprising a main pixel and a redundancy pixel which emit a same color; and a gate driver integrated in each of the plurality of unit pixels and comprising a plurality of stages, wherein each of the plurality of stages comprises a scan driving circuit for outputting a first scan signal and a second scan signal; and an emission driving circuit for outputting an emission control signal, wherein an output timing of the first scan signal supplied to the main pixel is the same as an output timing of the first scan signal supplied to the redundancy pixel, and wherein an output timing of the second scan signal supplied to the main pixel is different from an output timing of the second scan signal supplied to the redundancy pixel.

A display panel, a driving method, and a display device. The display panel includes: a base substrate, subpixels, driving lines, data lines, a gate driving circuit including clock signal lines and shift register units arranged in extension direction of clock signal lines. The clock signal lines is divided into clock signal line groups; the shift register units is divided into register unit groups; the shift register units in same register unit group are cascaded, adjacent two of shift register units in the extension direction are in different register unit groups; one register unit group corresponds to one clock signal line group; the gate of an input transistor is connected to a clock signal line in a corresponding clock signal line group, the second pole of input transistor is connected to the gate of an output transistor; the second pole of output transistor is connected to at least one driving line.

A display device includes a display panel, a display driver integrated circuit and a driving control circuit. The display panel includes a plurality of pixels connected to a plurality of driving lines and a plurality of source lines. The display driver integrated circuit includes a driving control signal generator. The driving control signal generator generates a driving control signal based on display device information and pixel values corresponding to at least a portion of the plurality of rows among a plurality of previous pixel values of a previous frame and a plurality of present pixel values of a present frame. The driving control circuit selectively connects the display driver integrated circuit with each of the plurality of driving lines based on the driving control signal such that first driving signals provided to first driving lines among the plurality of driving lines are blocked.

A light control panel including an image display region including a region corresponding to an image display region in a display panel and a region corresponding to a peripheral circuit region in the display panel is provided between the display panel and a backlight. A pattern image for controlling radiation of light emitted from the backlight to the display panel is displayed in the image display region in the light control panel according to an action state of the peripheral circuit in the display panel.

A display device including: first pixels connected to a first write line and a first compensation line; second pixels connected to a second write line and a second compensation line; third pixels connected to a third write line and a third compensation line; fourth pixels connected to a fourth write line and a fourth compensation line; fifth pixels connected to a fifth write line and a fifth compensation line; sixth pixels connected to a sixth write line and a sixth compensation line; seventh pixels connected to a seventh write line and a seventh compensation line; and eighth pixels connected to an eighth write line and an eighth compensation line, the first to fourth compensation lines are connected to a first node, the fifth and sixth compensation lines are connected to a second node, the seventh and eighth compensation lines are connected to a third node.

A display apparatus includes a display area, a non-display area surrounding the display area, and a bending area formed in at least one side of the non-display area. The display apparatus includes a first glass substrate provided in the display area, a second glass substrate provided in the non-display area, and a flexible substrate provided to overlap the bending area.

The present disclosure provides a driving circuit of a display panel and a display device. The driving circuit includes a gate-on-array (GOA) circuit transmitting a scan driving signal to the display panel through a corresponding gate signal line, and further includes a pull-down module and a control bus. The pull-down module is activated at a falling edge of a gate driving signal to accelerate a potential descent speed of the pull-down module, thereby increasing a charging time of a thin film transistor and realizing a narrow-frame display panel.

A driving backplane includes: a base; a first conductive layer disposed on the base, the first conductive layer including at least one first signal line; a first insulating layer disposed on a side of the first conductive layer away from the base; a second conductive layer disposed on a side of the first insulating layer away from the first conductive layer, the second conductive layer including at least one second signal line. Each first signal line and a second signal line constitute a signal line pair. In the signal line pair, extending directions of the first signal line and the second signal line are the same, an orthogonal projection of the first signal line on the base and an orthogonal projection of the second signal line on the base have a first overlapping region, and the second signal line is coupled to the first signal line.

A display panel includes a driving circuit and a signal line. The signal line includes at least two main signal sub-lines each including a first end and a second end, the first ends of the at least two main signal sub-lines are electrically coupled to each other, and the second ends thereof are electrically coupled to each other. N main signal sub-lines in the at least two main signal sub-lines are directly electrically coupled to the driving circuit. Each of the N main signal sub-lines is a direct-coupled main signal sub-line, and a main signal sub-line in the at least two main signal sub-lines other than the direct-coupled main signal sub-lines is an indirect-coupled main signal sub-line which is not directly electrically coupled to the driving circuit but electrically coupled to the driving circuit via the direct-coupled main signal sub-line, where N is a positive integer.

The present disclosure provides a shift register, a gate driving circuit, a display panel, and a driving method thereof. The shift register includes: an input circuit; an output circuit; a first control circuit configured to provide a potential of a first control signal terminal to a pull-down node, and provide a potential of a reference signal terminal to the pull-down node according to the potential of the pull-up node; and a second control circuit connected to the pull-down node, a second control signal terminal, the output signal terminal, and the reference signal terminal, wherein the second control circuit is configured to pull down a potential of the output signal terminal during a display phase under the control of a potential of the pull-down node and a potential of the second control signal terminal, and pull up the potential of the output signal terminal in a power-off phase.