A display device which exhibits light with high color purity is provided. A display device with low power consumption is provided. An embodiment is a display device which includes a first pixel electrode, a second pixel electrode, a light-emitting layer, a common electrode, a first protective layer, and a semi-transmissive layer. The light-emitting layer includes a first region positioned over the first pixel electrode and a second region positioned over the second pixel electrode. The common electrode is positioned over the light-emitting layer. The first protective layer is positioned over the common electrode. The semi-transmissive layer is positioned over the first protective layer. Reflectivity with respect to visible light of the semi-transmissive layer is higher than reflectivity with respect to visible light of the common electrode. The semi-transmissive layer does not overlap with the first region and overlaps with the second region. For example, the semi-transmissive layer may include an opening in a position overlapping with the first region.

Gate Driver on Array (GOA) circuit and display device solving problem of electrical stress easily biasing threshold voltage of thin film transistor (TFT), are provided. The GOA circuit including m cascaded GOA units, wherein an n.sup.th GOA unit includes a pull-up control unit, a pull-up unit, a compensation control unit, and a pull-down unit.

A flexible display apparatus includes a flexible substrate having an active area and an inactive area, the inactive area including a first area adjacent to the active area, a second area in which a pad is disposed, and a bending area disposed between the first area and the second area, wherein a plurality of wirings extending from the second area to the first area are disposed in the bending area, and at least one dummy pattern is in between the plurality of wirings.

A display device according to an embodiment of the present disclosure includes a see-through area for camera in which a camera module is disposed, a routing area disposed around the see-through area for camera and overlapped by at least one data line and scan line, and a pixel area which includes the see-through area for camera and the routing area and includes a plurality of sub-pixels including an organic light emitting element and a cathode is disposed therein.

A thin film transistor, a display panel comprising the same and a display apparatus are discussed. The thin film transistor comprises a buffer layer embodied on a substrate, a semiconductor layer embodied on the buffer layer, including a channel area, a first conductor portion and a second conductor portion, a gate insulating film embodied on the semiconductor layer, a gate electrode embodied on the gate insulating film, and an auxiliary electrode overlapped with the second conductor portion, wherein the first conductor portion is extended from one side of the channel area, and becomes a source area, and the second conductor portion is extended from the other side of the channel area, and becomes a drain area.

A circuit includes a first transistor whose gate is connected to a set terminal and whose source or drain is connected to an internal node, a second transistor connected such that one of a source and a drain is electrically connected to the internal node and the other one of the source and the drain is electrically connected to a reference voltage source, a third transistor connected such that a gate is connected to the internal node, one of a source and a drain is connected to a clock terminal, and the other one of the source and the drain is connected to a first output terminal, a bootstrap capacitor which is connected to the internal node and the first output terminal, and a stabilization circuit that suppresses a drop in potential at the internal node in a charging period of the bootstrap capacitor.

The present disclosure provides a display panel, a method for driving the display panel and a display device. The display panel includes a display region and a non-display region. The non-display region includes a first bonding region, and further includes first connection lines connected to a plurality of gate lines respectively and second connection lines connected to a plurality of data lines respectively. The display panel further includes at least one chip on film, the chip on film includes a second bonding region, a first region, and a second region between the second bonding region and the first region. A scanning driving integrated circuitry connected to the second bonding region via first wirings and a data driving integrated circuitry connected to the second bonding region via second wirings are bonded in the first region. The first wirings and the second wirings are arranged at different layers in the second region.

A circuit device includes: a selection signal output circuit configured to output a selection signal based on first to fourth driving sequences in demultiplex driving, and a data line driving circuit configured to output first to fourth data signals to a data signal supply line in order of the first to fourth driving sequences. In the first driving sequence, the selection signal output circuit activates an i-th selection signal, and the data line driving circuit outputs an i-th data signal to an i-th data line. At this stage of operation, after the first to fourth driving sequences, a rewriting operation in which the selection signal output circuit activates the i-th selection signal, and the data line driving circuit outputs the i-th data signal to the i-th data line is performed.

What is disclosed are systems and methods of compensation of images produced by active matrix light emitting diode device (AMOLED) and other emissive displays. The electrical output of a pixel is compared with a reference value to adjust an input for the pixel. In some embodiments an integrator is used to integrate a pixel current and a reference current using controlled integration times to generate values for comparison.

An array substrate, a method of driving an array substrate, and a display device are provided. The array substrate includes a display area, a slotting area, and a peripheral area, and the display area includes: a first area, which is in at least one side of the slotting area, and a second area which does not overlap with the first area. The array substrate includes a plurality of pixel units and a gate drive circuit. The gate drive circuit includes: a plurality of first shift register units, which are configured to drive a plurality of rows of pixel units in the first area, and a plurality of second shift register units which are configured to drive a plurality of rows of pixel units in the second area. A drive capability of a first shift register unit is lower than a drive capability of a second shift register unit.