A sensor includes a plurality of electric lines including row lines and column lines, a photodiode in a pixel, a drain of a first transistor connected to the photodiode in the pixel, a drain of a second transistor connected in series with a source of the first transistor in the pixel, a source of the second transistor being connected to a column line among the plurality of electric lines, and both a gate of the first transistor and a gate of the second transistor being connected to a row line among the plurality of electric lines, wherein a channel material of the first transistor is different from a channel material of the second transistor.

A display device includes a pixel matrix having pixel rows and pixel columns and including pixels having switching elements positioned alternately at a corner near an upper and a lower side of each pixel row and positioned alternately at a corner near an upper and a lower side of and alternately at a corner near a left and a right side of each pixel column; multiple pairs of gate lines transmitting a gate-on voltage; and multiple data lines transmitting data voltages, wherein each pair of gate lines are disposed at the upper and lower sides of each pixel row with the pixels in each row connected to the gate line positioned nearest the respective switching element, and each data line is disposed between adjacent pairs of pixel columns and connected to pairs of pixels where one pixel of the pair has a switching element positioned nearest the respective data line.

An organic light emitting diode display with improved aperture ratio includes: a substrate; first and second pixels disposed in a first row of the substrate and third and fourth pixels disposed in a second row adjacent to the first row and respectively disposed in the same columns as the first and second pixels; a scan line and a previous scan line applying a scan signal and a previous scan signal, respectively, to the pixel units; a data line and a driving voltage line applying a data signal and a driving voltage, respectively, to the pixel units; and a common initialization voltage line disposed between the first and second pixels and between the third and fourth pixels, commonly connected to the pixel units, and applying an initialization voltage. One common initialization contact hole connected to all pixels units and one initialization voltage line connected to the common initialization contact hole are surrounded by the pixel units.

Provided is a liquid crystal display device, including: a plurality of scanning connection lines formed on at least one side of edges of the image display region, the plurality of scanning connection lines connecting together a scanning signal drive circuit and a plurality of scanning signal lines; a selection circuit formed so as to be interposed between the plurality of scanning connection lines and the plurality of scanning signal lines, the selection circuit being configured to selectively short-circuit one of a plurality of the scanning signal lines to one of the plurality of scanning connection lines based on a selection signal; and a selection signal line connected to the selection circuit, the selection signal line transmitting the selection signal to the selection circuit.

An EL display includes a flexible board including: a plurality of connection terminals arranged at one side for connection with panel lines formed on a panel board; terminal connection lines for connecting points inside the flexible board with the connection terminals; serial connection lines for connecting between two or more of the connection terminals. On the flexible board: driver output terminals of each of gate driver ICs are connected to terminal connection lines; driver input terminals of the gate driver IC are connected to either terminal connection lines or the serial connection lines; and control terminals for performing logic setting of the gate driver IC are each arranged between connection terminals and driver input terminals to which the serial connection lines are connected. As a result, the number of control lines to be formed on the flexible board in serial connection is reduced.

Embodiments of the disclosure generally provide an integrated control system having an integrated controller that is configured to provide both display updating signals to a display device and a capacitive sensing signal to a sensor electrode that is disposed within the integrated input device. The internal and/or external signal routing configurations described herein can be adapted to reduce signal routing complexity typically found in conventional devices and reduce the effect of electrical interference created by the capacitive coupling formed between the display routing, capacitive sensing routing and/or other components within the integrated control system. Embodiments can also be used to reduce electromagnetic interference (EMI) on the display and touch sensing signals received, transmitted and processed within the integrated control system.

A pixel circuit, a driving method for the pixel circuit, a display panel, and a display device, the pixel circuit includes a selecting module (01), a writing module (02), a driving module (03), and a light emitting element (OLED). When a high-luminance picture needs to be displayed, the selecting module (01) outputs the signal from the first power supply signal terminal (VDDH) to the second node (P2), so that the signal from the first power supply signal terminal (VDDH) drives the light emitting element (OLED) to emit light; when a low-luminance picture is to be displayed, the selecting module (01) outputs a signal from the second power supply signal terminal (VDDL) to the second node (P2), so that the signal from the second power source signal (VDDL) drives the light emitting element to emit light.

Disclosed are an oxide thin film transistor (TFT), a method of manufacturing the same, and a display panel and a display device using the same, in which a first conductor and a second conductor are provided at end portions of a semiconductor layer formed of oxide semiconductor. The first conductor and second conductor are electrically connected to a first electrode and a second electrode, and covered by a gate insulation layer. The oxide TFT includes a semiconductor layer provided on a buffer and including an oxide semiconductor, a gate insulation layer covering the semiconductor layer and the buffer, a gate electrode provided on the gate insulation layer to overlap a portion of the semiconductor layer, and a passivation layer covering the gate and the gate insulation layer.

A display device includes a substrate having a first pixel region, a second pixel region having a smaller area than the first pixel region, the second pixel region being connected to the first pixel region, and a peripheral region surrounding the first pixel region and the second pixel region, a first pixel and a second pixel respectively at the first and second pixel regions, a first line connected to the first pixel and a second line connected to the second pixel, and a dummy unit in the peripheral region, the dummy unit overlapping with at least one of the first and second lines, the dummy unit being configured to compensate for a difference between a load value of the first line and a load value of the second line, wherein the dummy unit includes at least two sub-dummy units spaced from each other.

Disclosed is a display device, including: a substrate including a pixel area and a peripheral area; pixels provided in the pixel area as a plurality of pixel rows and a plurality of pixel columns; data lines configured to provide a data signal; scan lines configured to provide a scan signal; first power lines configured to provide a power source to the pixel columns; and a second power line connected to the first power lines and disposed in the peripheral area. A scan line connected to an i.sup.th pixel row may apply a scan signal to the i.sup.th pixel row, and a branched line branched from the scan line may apply an initialization signal to a k.sup.th pixel row (k≠i). A branched point of the scan line is disposed between a pixel most adjacent to the second power line of the i.sup.th pixel row and the second power line.