G09G2300/043

Display device and drive method therefor
09837016 · 2017-12-05 · ·

A monitor line electrically connectable with sources of drive transistors and positive electrodes of electro-optical elements is provided. A drive method includes a step of detecting the characteristics of a drive transistor, a step of detecting the characteristics of an electro-optical element, a step of storing characteristics data obtained on the basis of a result of the detection of the characteristics, as correction data for correcting a video signal, and a step of correcting the video signal on the basis of the correction data. Here, the length of a selection period is set to be equal for a monitored row and an unmonitored row. In addition, a potential given to the monitor line for the detection of the characteristics of the drive transistors and a potential given to the monitor line for the detection of the characteristics of the electro-optical elements are made different.

DISPLAY SUBSTRATE AND DISPLAY DEVICE
20220376020 · 2022-11-24 ·

A display substrate and a display device are provided. The display substrate includes a base substrate and a plurality of sub-pixels on the base substrate. Each sub-pixel includes a pixel circuit; pixel circuits are in columns in a first direction and rows in a second direction. The sub-pixels includes a first sub-pixel, and the display substrate further includes a first data line extended in the first direction and connected with the first sub-pixel. The sub-pixels further includes a second sub-pixel directly adjacent to the first sub-pixel in the second direction. A first capacitor electrode in the first sub-pixel and a first capacitor electrode in the second sub-pixel are in a same layer and are spaced apart from each other; and the first capacitor electrode in the first sub-pixel is overlapped with the first data line in a direction perpendicular to the base substrate to provide a first capacitor.

Display Device
20230186854 · 2023-06-15 ·

A display device may comprise a substrate, a plurality of driving transistors on the substrate, a plurality of anode electrodes connected with the plurality of driving transistors, a light emitting layer on the plurality of anode electrodes, and a plurality of split cathode electrodes on the light emitting layer. Each of the plurality of split cathode electrodes may alternate between a first state applied with a cathode voltage and a second state of floating not applied with the cathode voltage.

Organic light emitting diode display device

An organic light emitting diode display including: a data wiring that includes a main data line disposed in a display area and a first data line disposed in a peripheral area; a driving voltage wiring that includes a main driving voltage line disposed in the display area and a first driving voltage line that is connected with the main driving voltage line and disposed in the peripheral area while extending in a first direction; and a driving low-voltage wiring that includes a cathode extending to the peripheral area while overlapping the display area, and a plurality of first driving low-voltage connection portions that are connected with the cathode and disposed in the peripheral area, wherein each of the plurality of first driving low-voltage connection portions comprises a wiring portion extended in the first direction and a pad portion electrically connected with the wiring portion.

Pixel driving circuit, display panel and display apparatus

Provided is a pixel driving circuit, a display panel and a display apparatus. The pixel driving circuit includes: driving transistor having gate electrode connected to first node, first electrode connected to second node, and second electrode electrically connected to third node coupled to light emitting element; storage capacitor connected to the first node; and M first transistors having M first and second electrodes connected to the first node M functional signal terminals, respectively, M≥1. A driving cycle of the pixel driving circuit includes light-emitting stage and N non-light-emitting stages, N≥M. The M first transistors are respectively turned on in the N non-light-emitting stages, and the M first transistors are all turned off in the light-emitting stage. One of the N non-light-emitting stages includes first non-light-emitting stage adjacent to the light-emitting stage. Channel length L and width W of the first transistor satisfy: W × L < C st × Δ V .Math. i = 1 i = M C ox × ( V G _ off - V N 1 ) 2 .Math. "\[LeftBracketingBar]" V G _ off - V N

Cleaning common unwanted signals from pixel measurements in emissive displays
09830857 · 2017-11-28 · ·

Methods of compensating for common unwanted signals present in pixel data measurements of a pixel circuit in a display having a plurality of pixel circuits each including a storage device, a drive transistor, and a light emitting device. First pixel data is measured from a first pixel circuit through a monitor line. Second pixel data from the first pixel circuit or a second pixel circuit is measured through the monitor line or another monitor line. The first measured pixel data or the second measured pixel data or both are used to clean the other of the first measured pixel data or the second measured pixel data of common unwanted signals to produce cleaned data for parameter extraction from the first pixel and/or second pixel.

Light emitting display apparatus, method of repairing the same and method of driving the same
09830852 · 2017-11-28 · ·

A light emitting display apparatus includes a plurality of emission pixels in an active area, a plurality of dummy pixels in a dummy area; and a plurality of repair lines, each connecting an emission pixel of the emission pixels to a dummy pixel of the dummy pixels, wherein a data signal is simultaneously provided to the emission pixel and the dummy pixel which are connected to the repair line so that the emission pixel emits light.

Display device

A display device includes a display panel including a first data line, a second data line, and a pixel, the pixel including a first sub-pixel coupled to the first data line, and a second sub-pixel coupled to the second data line, a light stress compensator configured to generate a first data voltage control signal for the first sub-pixel based on a second data value of input image data for the second sub-pixel, in response to a first data value of input image data for the first sub-pixel being equal to or less than a first reference value, and a data driver configured to generate a first data signal based on the first data value for the first sub-pixel, to provide a first data voltage to the first data line, and to vary the first data voltage based on the first data voltage control signal.

DISPLAY SUBSTRATE AND DISPLAY DEVICE
20230169900 · 2023-06-01 ·

A display substrate and a display device are disclosed. The display substrate includes: a a transition region, located between a first display region and a second display region, the first display region, the second display region and the transition region are provided with a plurality of pixels, the plurality of pixels are arranged in an array in the first direction and a second direction intersecting with the first direction, a pixel per inch (PPI) of the first display region is greater than a PPI of the second display region and a PPI of the transition region, the transition region is further provided with a row driving circuit, the row driving circuit is configured to drive the plurality of pixels in the first display region, the second display region and the transition region by rows.

Display device

A display device includes a scan line extending in a first direction, a data line and a driving voltage line extending in a second direction crossing the first direction, a switching thin film transistor (“TFT”) connected to the scan line and the data line, a driving TFT connected to the switching TFT and including a driving semiconductor layer and a driving gate electrode, a storage capacitor connected to the driving TFT and including first and second storage capacitor plates, a node connection line between the data line and the driving voltage line and connected to the driving gate electrode, and a shielding portion between the data line and the node connection line.