A display apparatus includes a display panel including: a pixel array in which pixels including a plurality of light-emitting elements are arranged in a plurality of row lines and sub-pixel circuits provided for each of the plurality of light-emitting elements and providing a driving current to the light-emitting elements. The display apparatus also includes a drive unit is configured to: set image data voltages to the sub-pixel circuits of the display panel in a row line order during a data setting period for each row line; and drive the sub-pixel circuits to provide the driving current to the light-emitting elements of the pixel array in the row line order based on a sweep signal sweeping from a first voltage to a second voltage and the set image data voltages during a light-emitting period for each row line.

A display device including: first and second scan drivers; a data driver; a display unit including pixels connected to first and second scan lines, and data lines; and a controller controlling the first and second scan drivers, and the data driver, a first pixel includes: a light emitting element, a first transistor including a gate connected to a first node, wherein the first transistor is connected between a second node and a third node, a second transistor including a gate connected to a first scan line, the second transistor is connected between a data line and the second node, and a storage capacitor connected between the first node and a first power voltage; the first transistor is reverse biased by a second scan signal applied to a second scan line; and a first scan signal applied to the first scan line is different from the second scan signal.

An organic light-emitting diode (OLED) display is disclosed. In one aspect, the OLED display includes a lower substrate including a display area and a non-display area surrounding the display area, wherein a plurality of pixels are formed in the display area. The OLED display also includes an embedded circuit formed in the configured to apply a plurality of signals to the pixels, and an initialization wiring formed in the non-display area and configured to apply an initialization voltage to each of the pixels. The initialization circuit is formed in a layer so as to at least partially overlap with the area of the embedded circuit.

An organic light-emitting display apparatus includes an organic light-emitting diode, a switching transistor, a first light emission control transistor, and a driving transistor. The organic light-emitting diode includes an anode and a cathode for receiving a reference voltage. The switching transistor includes a gate electrode for receiving an nth scan signal and a source electrode for receiving a data signal, and is an NMOS transistor. The first light emission control transistor includes a gate electrode for receiving a light emission control signal, and is configured to turn on upon receiving the light emission control signal to determine a timing of flow of a driving current to the organic light-emitting diode, and is a PMOS transistor. The driving transistor is connected to the switching transistor and the first light emission control transistor and provides the driving current to the organic light-emitting diode.

Provided is a display apparatus including a screen portion in which unit panels in which a plurality of pixels formed from light-emitting elements is disposed are arranged, in which a first pixel-to-pixel pitch that is a space between two outer end pixels adjacent to each other across outer peripheries of the unit panels is equal to or larger than a second pixel-to-pixel pitch that is a space between each of the outer end pixels in each of the unit panels and a pixel adjacent to the outer end pixel, and the pixel-to-pixel pitches adjacent to each other in the array of the pixel-to-pixel pitches in a direction in which the first pixel-to-pixel pitch and the second pixel-to-pixel pitch are arranged in the unit panel are set to be P(in)≤P(out) where P(in) denotes the pixel-to-pixel pitch located on a central side of the unit panel and P(out) denotes the pixel-to-pixel pitch located on an outer peripheral side of the unit panel.

Disclosed are a display panel, a driving method therefor, a display device. The display panel includes pixel circuits, data lines, write control lines, compensation control lines, a first driving circuit connected to compensation control lines, a second driving circuit connected to write control lines. Each column of pixel circuits corresponds to one data line, each row of pixel circuits corresponds to one write control line, one compensation control line. The first driving circuit outputs compensation control signals to pixel circuits by compensation control lines, second driving circuit outputs write control signals to pixel circuits by write control lines. The pulse width of compensation control signals is N times pulse width of write control signals, write control signals on two adjacent write control lines do not overlap, an overlap time of compensation control signals on two adjacent compensation control lines is (N-1)/N of pulse width of compensation control signals.

A pixel circuit for a display device is disclosed. The pixel circuit may include a drive transistor configured to control an amount of current from a first power supply to a light-emitting device depending upon a voltage applied to a gate of the drive transistor. The light-emitting device includes a first terminal electrically connected to a second terminal of the drive transistor and a second terminal electrically connected to a second power supply. The pixel circuit may also include a storage capacitor including a first plate connected to the gate terminal of the drive transistor and a second plate connected to a first node. The pixel circuit may also include a plurality of transistors configured to couple the first power supply, a data voltage input line, and a preset voltage input line to the pixel circuit.

A display apparatus includes a display panel including a gate line and a data line, a controller generating a source output enable signal determining an output timing of a data voltage output to the data line, and a data driver including a signal changer, generating a final source output enable signal by using the source output enable signal, and randomly changing the output timing of the data voltage for each gate line by using the final source output enable signal.

The present disclosure is directed to a gate driver circuit configured to prevent a light-emitting element of a display device from emitting light in a sensing mode. The gate driver circuit allows a plurality of scan lines of the display device being concurrently sensed by pre-charging a node of the gate driver circuit prior starting a sensing mode. The present disclosure provides the benefit of sensing a greater number of pixels of a display in a shorter time while also ensuring that a sufficient charge is provided by the pre-charged node for a plurality of pixels of the plurality of scan lines to be sensed concurrently.

The present disclosure provides a driving circuit of a display panel and a display device. The driving circuit includes a gate-on-array (GOA) circuit transmitting a scan driving signal to the display panel through a corresponding gate signal line, and further includes a pull-down module and a control bus. The pull-down module is activated at a falling edge of a gate driving signal to accelerate a potential descent speed of the pull-down module, thereby increasing a charging time of a thin film transistor and realizing a narrow-frame display panel.