G09G2300/0465

Display driver, image processing circuitry, and method

A display driver that drives a display panel comprises storage circuitry, color addition processing circuitry, and drive circuitry. The storage circuitry stores F subpixel data acquired from color coordinate data indicating color coordinates of a displayed color in a predetermined color space displayed on the display panel when an R subpixel, a G subpixel, and a B subpixel in each of a plurality of pixels of the display panel are driven with drive signals corresponding to a minimum grayscale value and an F subpixel in each of the plurality of pixels which displays an additional color other than a primary color R, a primary color G, and a primary color B is driven with a drive signal corresponding to a maximum grayscale value. The color addition processing circuitry generates output FRGB data from input RGB data, in response to the F subpixel data stored in the storage circuitry.

DISPLAY APPARATUS AND ELECTRONIC DEVICE
20230022494 · 2023-01-26 ·

A novel display apparatus is provided. The display apparatus includes a first layer including a plurality of pixel circuits, a second layer provided over the first layer, a plurality of optical lenses provided over the second layer, a display region, and a plurality of light-receiving regions. The display region includes a first pixel circuit provided in the first layer and a light-emitting device provided in the second layer. The light-receiving region includes a second pixel circuit provided in the first layer and a light-receiving device provided in the second layer. The plurality of light-receiving regions are provided around the display region. The optical lens is provided at a position overlapping with the light-receiving region.

DISPLAY DEVICE, DISPLAY MODULE, AND ELECTRONIC DEVICE

A display device with an imaging function is provided. A high-resolution imaging device or display device is provided. The display device includes first to third switches, first and second transistors, a capacitor, first and second wirings, and a light-emitting and light-receiving element. One electrode of the first switch is electrically connected to the first wiring, and the other electrode is electrically connected to a gate of the first transistor and one electrode of the capacitor. One electrode of the second switch is electrically connected to one of a source and a drain of the first transistor, one electrode of the light-emitting and light-receiving element, and the other electrode of the capacitor, and the other electrode of the second switch is electrically connected to a gate of the second transistor and one electrode of the third switch. The other electrode of the third switch is electrically connected to the second wiring. The light-emitting and light-receiving element has a function of emitting light of a first color and a function of receiving light of a second color.

DEGRADATION COMPENSATOR, DISPLAY DEVICE HAVING THE SAME, AND METHOD FOR COMPENSATING IMAGE DATA OF THE DISPLAY DEVICE

A degradation compensator including a compensation factor determiner configured to determine a compensation factor based on a distance between adjacent sub-pixels, and a data compensator configured to apply the compensation factor to a stress compensation weight to generate compensation data for compensating image data.

Display panel and display device with scan line cut and connected to another scan line in adjacent row

A display panel includes a first display area and a second display area. The display panel includes a plurality of first pixel groups in the first display area, a plurality of second pixel groups in the second display area, and a plurality of scan lines connected to the first and second pixel groups. The second display area includes a plurality of light emitting areas in which the second pixel groups are respectively disposed, and a plurality of open areas in which the second pixel groups are not disposed. One of a second pixel group of an n-th row is cut and does not overlap an adjacent open area of the n-th row, and is connected in the second display area to a scan line of a second pixel group of an (n−1)-th row or a scan line of a second pixel group of an (n+1)-th row.

Display device and display panel
11705065 · 2023-07-18 · ·

In a display device and display panel, a display panel includes: a plurality of pixels arranged in a matrix, each including two white subpixels and a plurality of colored subpixels, and a data pad connecting two adjacent colored subpixels, among the plurality of colored subpixels, corresponding to a same color, in a first direction, wherein luminance data is applied to the white subpixel, wherein each of the plurality of colored subpixels includes a dual subpixel having a size of the two white subpixels arranged in a second direction, the dual subpixel including a plurality of transistors, wherein a first transistor in the dual subpixel is connected to a first signal line extending through a first of the two white subpixels, and wherein a second transistor in the dual subpixel, is connected to a second signal line extending through a second of the two white subpixels.

Display device

A display device includes a first display area including a plurality of first pixel areas, a second display area including a plurality of second pixel areas and a plurality of transmission areas, a plurality of pixels arranged in a matrix form in the first and second display areas, and a first signal line and a second signal line disposed to correspond to each pixel column in the plurality of pixels. In each pixel column, one of the first and second signal lines may extend over the first and second display areas, and a remaining one of the first and second signal lines may not be disposed in the second display area.

Shift register and gate driver circuit
11557359 · 2023-01-17 · ·

A shift register and a gate driver circuit are provided. The shift register includes an input unit, an output unit, an electrostatic discharge unit and a reset unit. The input unit provides an input signal. The output unit is coupled to the input unit and a gate output terminal. The output unit outputs an output signal through the gate output terminal according to the input signal. The electrostatic discharge unit is coupled to the output unit. After the gate output terminal outputs the output signal, the electrostatic discharge unit pulls down a voltage of the gate output terminal according to a low gate voltage. The reset unit is coupled to the input unit and the output unit. After the electrostatic discharge unit pulls down the voltage of the gate output terminal, the reset unit resets a voltage of a bootstrap node.

Electro-optical device

An electro-optical device is provided and includes a plurality of first signal lines extending in a first direction on a substrate; a plurality of second signal lines extending in a second direction on the substrate, the second direction intersecting the first direction; a pixel area in which a plurality of pixel electrodes are disposed; an outer peripheral edge of the pixel area having a curved portion or a bent portion; and a first circuit block, a second circuit block, and a third circuit block arranged along the outer peripheral edge, wherein the second circuit block is arranged between the first circuit block and the first circuit block, and a first gap between the first circuit bock and the second circuit block is different from a second gap between the second circuit block and the third circuit block.

PIXEL AND DISPLAY DEVICE
20230008643 · 2023-01-12 ·

A pixel includes: a light emitting diode; a first transistor; a first capacitor connected between a first node and a gate electrode of the first transistor; a second transistor including a first electrode electrically connected to the gate electrode of the first transistor, a second electrode and a gate electrode which receives a first scan signal; and a third transistor including a first electrode electrically connected to the second electrode of the second transistor, a second electrode electrically connected to a third voltage line, and a gate electrode which receives a second scan signal. During an initialization period, an initialization voltage provided from the third voltage line is provided to the gate electrode of the first transistor through the third and second transistors, and, when the initialization period is terminated, at least one of the second transistor and the third transistor is turned off.