A display device capable of improving image quality is provided. A display device includes a plurality of pixel blocks in a display region. The pixel blocks each include a first circuit and a plurality of second circuits. The first circuit has a function of adding a plurality of pieces of data supplied from a source driver. The second circuit includes a display element and has a function of performing display in accordance with the added data. One pixel has a configuration including one second circuit and an component of the first circuit that is shared. When the first circuit is shared by a plurality of pixels, the aperture ratio can be increased.

A display device includes a pixel in a display area. The pixel includes: spaced apart first and second electrodes; a first insulating layer on the first electrode and the second electrode and between the first electrode and the second electrode and having a first etch selectivity; a first insulating pattern on the first insulating layer between the first electrode and the second electrode, and having a second etch selectivity; a light emitting element on the first insulating pattern; a second insulating pattern having the second etch selectivity and being on one area of the light emitting element such that a first end and the second end of the light emitting element are exposed; and third and fourth electrodes configured to electrically connect the first end and the second end of the light emitting element to the first and second electrodes, respectively.

A display device includes: a first pixel including a first organic light emitting diode; an initialization voltage generator for generating a first initialization voltage to be supplied to an anode of the first organic light emitting diode; and a timing controller including a first lookup table in which a plurality of first initialization voltage values corresponding to a plurality of maximum luminances are recorded, the timing controller being configured to determine a value of the first initialization voltage, based on reception information on a target maximum luminance and the first lookup table.

An interpolated flat-panel display comprises a display substrate, pixel controllers disposed in a controller array over the display substrate, and pixels disposed in a pixel array over the display substrate. Each pixel controller is connected to one or more control lines and is operable to output pixel information. Each pixel is operable to emit light in response to pixel information received from a pixel controller. The pixel array is larger than the controller array, each pixel is connected to at least one pixel controller, and at least some pixels are interpolated pixels connected to at least two pixel controllers and are operable to emit light in response to pixel information received from the at least two pixel controllers.

A pixel includes a first light source including at least one first light emitting element between a first split electrode and a second power supply; a second light source unit including at least one second light emitting element between a second split electrode and the second power supply; a driving-current generator including a first transistor between a first power supply and the first and second light source units and generating a driving current corresponding to a first data signal; a first switching unit including a first switching element between the driving-current generator and the first light source; and a second switching unit including a second switching element between the driving-current generator and the second light source unit and controlling an electrical connection between the first and second light source units in response to a second data signal.

A pixel circuit includes a light emitting element, a first driver transistor, a second driver transistor, and a first compensation capacitor. A first terminal of the first driving transistor is configured to receive a power signal, and a second terminal of the first driving transistor is electrically coupled to the light emitting element. A first terminal of the second driving transistor receives the power signal, and a control terminal of the second driving transistor is electrically coupled to the light emitting element. The first compensation capacitance is electrically coupled to a control terminal of the first driving transistor and the second terminal of the second driving transistor, respectively.

A display device including a plurality of sub-pixel arrays is provided. Each of sub-pixel arrays includes a plurality of first sub-pixels, at least one second sub-pixel and at least one third sub-pixel. The first sub-pixels have a first color and form a plurality of vertexes of a virtual quadrilateral. There is not any other first sub-pixels having the first color located in the virtual quadrilateral. The second sub-pixel has a second color different from the first color and is located in the virtual quadrilateral. The third sub-pixel has a third color different from the first color and the second color and is located in the virtual quadrilateral.

A thin film transistor array substrate having a pixel arrangement structure includes a first sub-pixel for displaying a first color and a second sub-pixel for displaying a second color alternately located in a first column, and a third sub-pixel for displaying a third color in a second column adjacent to the first column, and via holes of the first through third sub-pixels in a same row are at different positions.

A display device and a display panel including a first display region and a second display region. The light transmittance of the first display region is greater than the light transmittance of the second display region. At least one first display unit is disposed in the first display region. At least one second display unit, at least one drive unit, and at least one gating switch unit are disposed in the second display region. The at least one drive unit is connected to the input end of the at least one gating switch unit in a one-to-one manner. The first output end of each gating switch unit is connected to one of a first display unit and a second display unit and the second output end of the each gating switch unit is connected to the other one of the first display unit and the second display unit.

The present disclosure provides a display substrate, a method for manufacturing the same, a driving method and a display device. The display substrate includes a base substrate, gate lines, data lines and sub-pixels. The sub-pixels include sub-pixel columns corresponding to the data lines in a one-to-one manner. In a sub-pixel driving circuit of the sub-pixel, a driving transistor and a data writing transistor are located at a first side of an aperture area of the sub-pixel; a sensing transistor is located at a second side of the aperture area of the sub-pixel. The first side and the second side are opposite sides of the aperture area along the extension direction of the data lines. Gate electrodes of sensing transistors in a same sub-pixel row, and gate electrodes of data writing transistors in an adjacent next sub-pixel row, are all coupled to a gate line corresponding to the adjacent next sub-pixel row. There is a first overlapping area between an orthographic projection of a first electrode plate of the storage capacitor to the base substrate and an orthographic projection of a second electrode plate of the storage capacitor to the base substrate; an orthographic projection of the first overlapping area to the base substrate at least partially overlaps an orthographic projection of the corresponding aperture area of the sub-pixel.