The disclosure provides an electrical apparatus. The electrical apparatus includes a timing controller, a data driver circuit, and a display panel. The timing controller is configured to receive at least one data polarity configuration signal. The timing controller generates and outputs a plurality of polarity inversion signals according to the data polarity configuration signal. The phases of the polarity inversion signals are different. The data driver circuit is coupled to the timing controller. The data driver circuit is configured to receive the polarity inversion signals. The display panel is coupled to the data driver circuit. The display panel is configured to display images. The data driver circuit drives the display panel to display the images according to the polarity inversion signals.

A pixel circuit of a display panel is provided, including a first, second, third, fourth, fifth switch, a first capacitor and a diode. The first switch is connected with a positive supplied power voltage. The second switch is connected with the first switch and a data line. The third switch is connected with the first and second switch, generating an emission current as a driving transistor. First end of the first capacitor is connected with the first, second and third switch. Second end of the first capacitor is connected with the third, fourth and fifth switch. The fifth switch is connected with a first initial voltage. Anode of the diode is connected with the third and fourth switch while its cathode is connected with a negative emission source voltage. By configuration of the disclosed pixel circuit, a power rail emission current is independent, without being involved with initial voltages.

An organic light emitting display device includes a plurality of pixels. Each of the pixels includes an organic light emitting diode, first to third transistors, a storage capacitor, and a first capacitor. The second transistor includes a gate electrode receiving a first scan signal, a first electrode receiving a data signal, and a second electrode connected to a first electrode of the first transistor. The third transistor includes a gate electrode receiving a second scan signal, a first electrode connected to a second electrode of the first transistor, and a second electrode connected to a gate electrode of the first transistor. The storage capacitor includes a first electrode receiving a power voltage and a second electrode connected to the gate electrode of the first transistor. The first capacitor includes a first electrode connected to the gate electrode of the third transistor and a second electrode receiving the power voltage.

A method for controlling a display panel includes: controlling polarities of data signals transmitted to pixel circuits in partial columns in a target display region to be inverted when a (KN−1).sup.th frame is displayed; and controlling polarities of data signals transmitted to pixel circuits in other columns than the partial columns in the target display region to be inverted when a KN.sup.th frame is displayed.

A display device has a write period of charging a holding capacitor included in each of pixels arranged in a first direction and a second direction different from the first direction in a display region, and has a hold period of holding capacitance of the holding capacitor charged during the write period. The display device comprises a potential maintenance circuit configured to maintain, during the hold period, one of three potential values of a positive-polarity potential, a ground (GND) potential, and a negative-polarity potential having charged the holding capacitor during the write period.

The present disclosure provides a method, a device, a system, and a display device for adjusting a luminance viewing angle of a liquid crystal display panel. The method obtains an actual value of a luminance viewing angle corresponding to a current image, adjusts a positive and negative polarity driving voltage when the actual value is less than a threshold value to obtain a relational expression between the positive and negative polarity driving voltage and the luminance viewing angle, processes a difference value between the actual value and the threshold value to obtain a target driving voltage value, and adjusts the positive and negative polarity driving voltage according to the target driving voltage value, thereby realizing adjustment of the luminance viewing angle.

An electroluminescent display device includes a display panel in which a plurality of pixels are disposed, each pixel including a first sub pixel, a second sub pixel, a third sub pixel, and a fourth sub pixel each having a different color; a data driver which supplies a data voltage to the plurality of pixels by means of a plurality of data lines; and a gate driver which supplies a gate signal to the plurality of pixels by means of a plurality of gate lines. Each of the plurality of data lines is divided into a plurality of sub data lines, and each of the plurality of sub data lines is connected to a plurality of sub pixels having the same color, the sub pixel includes a switching transistor, and a source electrode of the switching transistor includes a compensation pattern which is provided on at least one side of the source electrode spaced apart from the gate line, thereby improving luminance difference between sub pixels having the same color which are converted by the exposure overlay shift of the gate line.

A display panel includes a pixel structure, including a plurality of pixel groups, and the pixel group includes: a first switch, having a second end coupled to a first main pixel; a second switch, having a second end coupled to a first sub-pixel; a third switch, having a second end coupled to the first sub-pixel; a first capacitor, having one end coupled to a first end of the third switch and another end coupled to a common electrode; and a fourth switch, having a second end coupled to a second main pixel; a fifth switch, having a second end coupled to a second sub-pixel; a sixth switch, having a second end coupled to the second sub-pixel; a second capacitor, having one end coupled to a first end of the sixth switch and another end coupled to the common electrode.

Disclosed are a row drive circuit (100) of an array substrate and a display device. The row drive circuit (100) includes N row drive units (10) arranged in cascade and auxiliary circuit units (20). The N.sup.th row drive unit (10) is configured to output N.sup.th gate driving signal to pre-charge and charge the N.sup.th row of sub-pixels, when its signal input end receives the gate driving signal output by (N−2).sup.th row drive unit (10). The N.sup.th auxiliary circuit unit (20) is configured to control N.sup.th row drive unit (10) skip pre-charging the sub-pixels, when (N−1).sup.th timing control signal received by the first timing signal input end of N.sup.th auxiliary circuit unit (20) and (N+1).sup.th timing control signal received by the second timing signal input end of N.sup.th auxiliary circuit unit (20) are high level. N is positive integer greater than or equal to two. The present disclosure solves the problem that the charging saturation of two adjacent pixels which both share one data line is inconsistent due to the large step voltage of the data voltage, when the data signal is converted. As such bright lines and dark lines may be generated in the display panel. Therefore, the display device has a good displaying effect.

This application discloses a charge sharing circuit and charge sharing method for a display panel and a display panel. The charge sharing circuit includes a controller (250) and n sets of sharing sub-circuits (240), where each set of sharing sub-circuits (240) operates in response to a corresponding one of different polarity driving modes of pixel electrodes of the display panel, each set of sharing sub-circuits (240) includes a plurality of control elements (241), in a set of sharing sub-circuits (240), each of the data lines is connected to only one control element (241), within the same period of time, the controller drives only one set of sharing sub-circuits to operate, and n≥1.