Aspects of the subject technology relate to display circuitry. The display circuitry includes gate-in-panel (GIP) control circuitry on opposing sides of a display pixel array. The GIP control circuitry can include scan drivers for each pixel row on both sides of that pixel row, the scan drivers on either side configured for enablement or disablement for single-sided reduced-power operations. The GIP control circuitry can include a single scan driver and a single emission controller for each pixel row, in which the scan driver and emission controller for each row are disposed on opposing sides of the row. The scan drivers for a first subset of the pixel rows can be interleaved with the emission controllers for a different subset of the pixel rows.

A display method and a display device are disclosed. The method includes: detecting whether a displayed content in a display screen changes; controlling the display screen to update alternately display data respectively corresponding to a first part and a second part of a display unit in each column of display unit, in response to detecting that the displayed content does not change. The number of updated pixels of the display screen each time may be reduced, while the original refresh frequency is maintained, so the problem that the splash screen phenomena is caused in the display screen by reducing the refresh frequency of the display screen may be solved, thus achieving effects of avoiding the splash screen phenomena of the display screen and of reducing the power consumption of the display screen while maintaining the original refresh frequency of the display screen.

A display device is disclosed. In one aspect, the device includes a plurality of pixels arranged in rows and columns, each pixel including a transistor that includes first and second electrodes in a column direction, and a channel curved between the first and second electrodes, and a capacitor overlapping the transistor. The device also includes a first data line connected to at least one first pixel in an odd row of the pixels arranged in the columns, and overlapping a first electrode of a transistor of the first pixel and a second data line connected to at least one second pixel in an even row of the pixels arranged in the columns, and overlapping a first electrode of a transistor of the second pixel. The first and second data lines are arranged in the columns and are parallel to one another.

A scanning beam display system includes an optical module, an image control module, and a display screen on which optical beams are scanned. The optical module includes a vertical adjuster placed in the optical paths of the beams to control and adjust positions of the optical beams along a generally vertical direction on the display screen, and a control unit configured to receive control instructions for the vertical adjuster and to control the vertical adjuster to be at one of a predetermined number of orientations to place the scanning optical beams at a corresponding distinct position on the display screen. The control unit is further configured to apply an adjustment offset to each orientation of the vertical adjuster such that each immediately vertically adjacent pair of beam footprints projected on the display screen resulting from the plurality of positions have a vertical overlap that is larger than a first threshold.

A method for driving electro-optic displays including a layer of electro-optic material disposed between a common electrode and a backplane including an array of pixel electrodes, each coupled to a pixel transistor. The method for driving includes apportioning a displayable region of the electro-optic display into N BRAID line groups, where each of the N BRAID line groups is associated with a frame buffer. The method also includes receiving first image data comprising optical state data for the entire displayable region of the electro-optic display, and sequentially writing subsets of the first image data to each of the N frame buffers, wherein each of the N frame buffers is written with data corresponding to the corresponding BRAID line group. The method also includes sequentially updating portions of the displayable region of the electro-optic display based on the data in each of the N frame buffers.

A scanning beam display system includes an optical module, an image control module, and a display screen on which optical beams are scanned. The optical module includes a vertical adjuster placed in the optical paths of the beams to control and adjust positions of the optical beams along a generally vertical direction on the display screen, and a control unit configured to receive control instructions for the vertical adjuster and to control the vertical adjuster to be at one of a predetermined number of orientations to place the scanning optical beams at a corresponding distinct position on the display screen. The control unit is further configured to apply an adjustment offset to each orientation of the vertical adjuster such that each immediately vertically adjacent pair of beam footprints projected on the display screen resulting from the plurality of positions have a vertical overlap that is larger than a first threshold.

A display method, device and a computer-readable medium are provided. The method includes: detecting whether there is any change in a displayed content for the display; in response to detecting that the displayed content for the display does not change, controlling the display to alternately update display data corresponding to a first portion and a second portion of display units in each row when the display unit comprises m rows of pixels; and in response to detecting that the displayed content for the display does not change, controlling the display to alternately update display data corresponding to a third portion and a fourth portion of display units in each column when the display unit comprises n columns of pixels. Herein m and n are positive integers. Thus, screen flicker caused by reduction of refresh frequency of a display while the display content does not change can be avoided.

A method for driving electro-optic displays including a layer of electro-optic material disposed between a common electrode and a backplane including an array of pixel electrodes, each coupled to a pixel transistor. The method for driving includes apportioning a displayable region of the electro-optic display into N BRAID line groups, where each of the N BRAID line groups is associated with a frame buffer. The method also includes receiving first image data comprising optical state data for the entire displayable region of the electro-optic display, and sequentially writing subsets of the first image data to each of the N frame buffers, wherein each of the N frame buffers is written with data corresponding to the corresponding BRAID line group. The method also includes sequentially updating portions of the displayable region of the electro-optic display based on the data in each of the N frame buffers.

A liquid crystal display device includes a liquid crystal panel; at least one source driving unit including at least one first fan-out line and at least one second fan-out line which are disposed alternately; at least one demultiplexer electrically coupled to the first fan-out line and the second fan-out line, the demultiplexer including a plurality of buses, a plurality of first output lines, and a plurality of second output lines; and a plurality of pixel units, each of the pixel units including four sub-pixels. The liquid crystal display device is capable of solving the flicker problem and the crosstalk problem in the prior art.

Provided is a video processing device that generates a display video signal to be supplied to a liquid crystal display having a liquid crystal that is driven by a frame inversion scheme and includes a control microcomputer and a video signal processor. The control microcomputer controls a data enable signal such that a display invalid section having a predetermined number of fields is set for an interlace video signal at a predetermined period based on a vertical synchronization signal included in the interlace video signal input from outside. The video signal processor generates the display video signal by setting the display invalid section for the interlace video signal based on the data enable signal and outputs the display video signal to the liquid crystal display.