A display device including: a display panel including a plurality of pixels; a data driver configured to provide data voltages to the plurality of pixels; and a controller configured to control the data driver, to detect a same data region of the display panel when first image data in a current frame period is the same as second image data in a previous frame period, and not to transfer the first image data to the data driver in the current frame period.

First to fourth switches are provided so that conduction states are able to be controlled independently of each other. The first switch, the third switch, and the second switch are electrically connected in series between a first wiring and a third wiring. The fourth switch has a function of controlling a conduction state between the light-emitting element and a fourth wiring. In a first transistor, a gate is electrically connected to a node to which the third switch and the second switch are electrically connected, one of a source and a drain is electrically connected to a second wiring, and the other is electrically connected to the light-emitting element. A capacitor includes first and second electrodes, the first electrode is electrically connected to a node to which the first switch and the third switch are electrically connected, and the second electrode is electrically connected to the light-emitting element.

The present disclosure describes a display panel and a circuit to generate a data signal current included thereof. The circuit further comprises a signal voltage module to generate a primary signal voltage and send to a second storage capacitor in a control module to output a data signal voltage. The second storage capacitor is coupled to a first storage capacitor and a gate of a current output transistor, so that the primary signal voltage is stored at the joint node. A threshold voltage of the current output transistor, generated by a voltage compensation module, is then added on to the gate of the current output transistor, so that an output current compensated by the threshold voltage is realized.

A pixel includes a pixel circuit and an organic light emitting diode. The pixel circuit has first, second, third, and fourth transistors. The first transistor controls an amount of current flowing from a first driving power supply coupled to a first node to a second driving power supply through the organic light emitting diode. The turns on when a scan signal is supplied to a first scan line. The third transistor turns on when a scan signal is supplied to a second scan line. The fourth transistor turns on when a scan signal is supplied to a third scan line. The first transistor is a p-type Low Temperature Poly-Silicon thin film transistor and the third transistor and the fourth transistor are n-type oxide semiconductor thin film transistors.

An embodiment relates to a pixel sensing technique. By supplying a precharge voltage to a sensing line using an amplifier used in pixel sensing, it is possible to minimize differences between precharge voltages of sensing lines and solve a crosstalk problem between the sensing lines, while not increasing a size of a pixel sensing device.

To suppress fluctuation in the threshold voltage of a transistor, to reduce the number of connections of a display panel and a driver IC, to achieve reduction in power consumption of a display device, and to achieve increase in size and high definition of the display device. A gate electrode of a transistor which easily deteriorates is connected to a wiring to which a high potential is supplied through a first switching transistor and a wiring to which a low potential is supplied through a second switching transistor, a clock signal is input to a gate electrode of the first switching transistor, and an inverted clock signal is input to a gate electrode of the second switching transistor. Thus, the high potential and the low potential are alternately applied to the gate electrode of the transistor which easily deteriorates.

A display device including first to eighth pixels successively arranged in a first direction on a first horizontal line, and first to sixteenth data lines each extending in a second direction and successively arranged in the first direction, in which the second and third data lines are disposed between the first and second pixels and respectively connected to the first and second pixels, the sixth and seventh data lines are disposed between the third and fourth pixels and respectively connected to the third and fourth pixels, the tenth and eleventh data lines are disposed between the fifth and sixth pixels and respectively connected to the fifth and sixth pixels, the fourteenth and fifteenth data lines are disposed between the seventh and eighth pixels and respectively connected to the seventh and eighth pixels.

A display device include a substrate on which a plurality of first sub-pixels disposed in first columns and a plurality of second sub-pixels disposed in second columns are defined; a plurality of data lines disposed on one sides of the plurality of first sub-pixels and the other sides of the plurality of second sub-pixels; and a plurality of parking voltage lines disposed between the plurality of first sub-pixels and the plurality of second sub-pixels, wherein the plurality of parking voltage lines are configured to be electrically connected to some of the plurality of data lines. Accordingly, by applying the same parking voltage to the parking voltage lines and the data lines during a blank frame, flicker can be reduced.

The present disclosure provides methods, apparatuses, and non-transitory computer-readable mediums for setting charge sharing times, which may be adaptable to a display panel. In some embodiments, the apparatus includes a pixel array and a source driver configured to drive each column of the pixel array. In some embodiments, a setting method of charge sharing times includes grouping a plurality of pixels of a pixel array in a row direction to form a plurality of pixel groups. The setting method further includes setting a charge sharing time of each pixel group of the plurality of pixel groups according to a quantity of pixel groups in the plurality of pixel groups. A charge sharing time of a pixel group located closest to a source driver in the pixel array is greater than a charge sharing time of a pixel group located farthest from the source driver in the pixel array.

In a pulse output circuit in a shift register, a power source line which is connected to a transistor in an output portion connected to a pulse output circuit at the next stage is set to a low-potential drive voltage, and a power source line which is connected to a transistor in an output portion connected to a scan signal line is set to a variable potential drive voltage. The variable potential drive voltage is the low-potential drive voltage in a normal mode, and can be either a high-potential drive voltage or the low-potential drive voltage in a batch mode. In the batch mode, display scan signals can be output to a plurality of scan signal lines at the same timing in a batch.