Patent classifications
G09G2310/027
Multi-row buffering for active-matrix cluster displays
An active-matrix display with passive-matrix pixel clusters includes pixel clusters each having a cluster controller and a display controller operable to provide pixel data to the cluster controllers. Each pixel cluster includes pixels disposed in an array of N rows (N>=2) and M columns (M>=1), (N+1) memory banks, and a cluster controller operable to control the pixels and memory banks. Each memory bank is operable to store pixel data for a row of pixels. The cluster controller is operable to input pixel data for a row of pixels and store the pixel data in an input memory bank of the (N+1) memory banks and output stored pixel data from one or more output memory banks of the (N+1) memory banks that are not the input memory bank to control corresponding one or more rows of pixels.
LIGHT EMITTING DEVICE AND LIGHT EMITTING METHOD
A light emitting device and a light emitting method are provided. The light emitting device includes a plurality of sub-pixels. Each of the sub-pixels displays a grayscale during a frame. The frame includes N sub-frames. Each of the sub-frames include a scan period and an emission period. Each of the sub-pixels include a pixel circuit and a light emitter. The pixel circuit include a current control circuit and a pulse width modulation (PWM) circuit. The current control circuit receives an analog signal, and outputs a driving current according to the analog signal. The PWM circuit receives M digital signals and M reference pulse signals, and outputs a PWM pulse according to the M digital signals and the M reference pulse signals. The light emitter receives the driving current and the PWM pulse during emission period of each of the N sub-frames.
DISPLAY DEVICE PERFORMING CLOCK GATING
A display device includes a display panel including a plurality of pixels, a controller configured to output image data and a gated clock signal, the image data including a plurality of pixel data for the plurality of pixels, and a data driver configured to receive the image data and the gated clock signal from the controller, and to sample the image data in response to the gated clock signal. The controller detects a repeated data pattern where same pixel data is repeated in the image data, generates a clock enable signal having an off level in a period in which the repeated data pattern is transferred, and gates an input clock signal in response to the clock enable signal to produce the gated clock signal.
DISPLAY DRIVER
A display driver includes a line latch circuit; a first D/A conversion circuit; a second D/A conversion circuit; a first amplifier circuit configured to initialize charges of a capacitor of a first switched capacitor circuit in a first initialization period and output a data voltage in a first output period; a second amplifier circuit configured to initialize charges of a capacitor of a second switched capacitor circuit in a second initialization period and output a data voltage in a second output period; and a control circuit. The control circuit is configured to end the second initialization period of the second amplifier circuit before display data is latched by the line latch circuit at a latch timing and an output of the first amplifier circuit changes.
FAULT DETECTION DISPLAY APPARATUS AND OPERATION METHOD THEREOF
Disclosed is integrated circuit panel which detects fault of a driving circuit. The integrated circuit panel includes: a driving circuit array including first and second driving circuits; a data driver configured to output first and second input data signals through first and second data lines, respectively; a switch driver configured to output a switching signal through a switch line; and an error detection driver configured to receive first and second output data signals through first and second test lines, respectively, wherein, in response to the switching signal, the first and second driving circuits are configured to output the first and second output data signals, which are based on the first and second input data signal, through the first and second test lines, respectively, and the error detection driver is configured to detect a fault of the first or second driving circuit based on the first or second output data signal.
Method and system for driving light emitting display
A display system includes a driver for operating a panel having a plurality of pixels arranged by a plurality of first lines and at least one second line The driver includes a driver output unit for providing to the panel a single driver output for activating the plurality of first lines, the single driver output being demultiplexed on the panel to activate each first line.
DISPLAY DEVICE
A display device, includes: a display panel including a pixel electrically coupled to a gate line and a data line; a gate driver configured to provide a gate signal to the gate line; and a data driver configured to provide a data signal to the data line, wherein the gate driver is configured to sequentially provide a first gate signal and a second gate signal to the gate line during a first frame period, wherein the data driver is configured to provide a first data signal to the data line in response to the first gate signal, and to provide a second data signal to the data line in response to the second gate signal, and wherein the second data signal is different from the first data signal and varies dependent on the first data signal.
LIQUID CRYSTAL DISPLAY DEVICE AND ELECTRONIC DEVICE
To provide a semiconductor device, a liquid crystal display device, and an electronic device which have a wide viewing angle and in which the number of manufacturing steps, the number of masks, and manufacturing cost are reduced compared with a conventional one. The liquid crystal display device includes a first electrode formed over an entire surface of one side of a substrate; a first insulating film formed over the first electrode; a thin film transistor formed over the first insulating film; a second insulating film formed over the thin film transistor; a second electrode formed over the second insulating film and having a plurality of openings; and a liquid crystal over the second electrode. The liquid crystal is controlled by an electric field between the first electrode and the second electrode.
Touch Display Device, Method for Driving the Same, Driving Circuit, Data-Driving Circuit, and Gate-Driving Circuit
The present embodiments may provide a touch display device including: a display panel in which a plurality of data lines, a plurality of gate lines, and a plurality of touch electrodes are disposed; a gate-driving circuit configured to drive the plurality of gate lines; a data-driving circuit configured to drive the plurality of data lines; and a touch-driving circuit configured to drive the plurality of touch electrodes while the plurality of data lines and the plurality of gate lines are driven. In this touch display device, while a touch-driving signal swings with a predetermined amplitude, a data signal and a gate signal may also swing with the predetermined amplitude. According to the present embodiments, it is possible to enable high-speed image display and high-speed touch sensing, to perform a display operation and a touch operation simultaneously, and to display an image normally without any image change.
PIXEL CIRCUIT DRIVING METHOD, PIXEL CIRCUIT THEREFOR, AND DISPLAY MODULE USING THE SAME
A pixel circuit driving method of controlling an operation of a light-emitting element provided in a pixel of a display panel may comprise: applying pulse amplitude modulation (PAM) signals having a plurality of levels to a first terminal of a first transistor having a second terminal connected to a control terminal of a second transistor configured to drive the light-emitting element with a current according to a gray scale required for the light-emitting element; and applying a PAM signal of any one level selected from the PAM signals to the control terminal of the second transistor during each sub-frame time corresponding to a turn-on time of the first transistor controlled by a pulse width modulation (PWM) signal having a plurality of sub-frames in a single frame according to the gray scale.