An electroluminescent device and a display device including the electroluminescent device. The electroluminescent device includes a first electrode and a second electrode each having a surface opposite the other; a light emitting layer disposed between the first electrode and the second electrode, the light emitting layer including quantum dots; and an electron transport layer disposed between the light emitting layer and the second electrode, the electron transport layer including inorganic material nanoparticles including an anion dopant including P, N, C, Cl, F, Br, S, or a combination thereof.

A display substrate and a display device are provided, the display substrate includes: a base substrate and a plurality of reset signal lines, the base substrate includes a display region, each of the sub-pixels includes a pixel driving circuit and a light-emitting element, the light-emitting element includes a light-emitting region and a first electrode, the pixel driving circuit is configured to drive the light-emitting element to emit light; orthographic projections of the first electrodes of the light-emitting elements of the sub-pixels of the pixel units on a board surface of the base substrate at least partially overlap with orthographic projections of the pixel driving circuits of the sub-pixels of the plurality of pixel units on the board surface of the base substrate, and are located on a same side of the reset signal lines electrically connected to the pixel driving circuits of the sub-pixels of the plurality of pixel units.

Disclosed are a display panel having a large area, high resolution, a narrow bezel, low power consumption, and having reduced Resistance Capacitance (RC) delay, and a display device including the same. The display panel includes an Active Area Gate-In-Panel (AAGIP) disposed between adjacent pixel blocks, wherein the AAGIP unit is configured to: connect an n scan line disposed in and along sub-pixels of an n-th row of the pixel block on one side of the AAGIP unit and an n scan line disposed in and along sub-pixels of an (n+1)-th row of the pixel block on the other side thereof to each other; and connect an n+1 scan line disposed in and along sub-pixels of an (n+1)-th row of the pixel block on one side thereof and an n+1 scan line disposed in and along sub-pixels of an n-th row of the pixel block on the other side thereof to each other. Thus, defect such as crosstalk or smear caused by data line transition is reduced.

Driving method of display panel, display panel, and display device are provided. The driving method includes a first-frequency driving mode and a second-frequency driving mode. A first frequency of the first-frequency driving mode is lower than a second frequency of the second-frequency driving mode. In the first-frequency driving mode, a frame time includes a scanning section and a front and rear porch section, and the scanning section and the front and rear porch section are operated in sequence. In the scanning section, sub-pixels of the display panel are scanned, and in the front and rear porch section, the sub-pixels of the display panel are not scanned. The display panel includes data lines. The front and rear porch section corresponding to at least part of a plurality of frames includes at least one compensation section. In a compensation section, a data signal is provided to each data line.

A pixel includes: a light emitting element; a first transistor which drives the light emitting element; a second transistor electrically connected between a gate node of the first transistor and a data line; a third transistor electrically connected between a first node of the first transistor and an initialization voltage line; and a storage capacitor electrically connected between the gate node and the first node of the first transistor. Here, upon an operation in a variable frame mode, an initialization voltage is applied to the initialization voltage line, and the initialization voltage has a first voltage level. In addition, in a data writing period during which the storage capacitor is charged with an electric charge, the initialization voltage further includes a pulse voltage such that the initialization voltage has a second voltage level that is greater than the first voltage level.

A display device includes a timing controller for supplying a clock training signal through a data clock signal line in a first period of one frame period, and supplying image data through the data clock signal line in a second period of the one frame period, a data driver for generating a clock signal, based on the clock training signal in a clock training period in the first period, and generating a data signal, based on the clock signal and the image data in the second period, and a pixel unit for displaying an image, based on the data signal. The clock training signal includes a plurality of signal levels, and the data driver determines the clock training period, based on the signal levels of the clock training signal.

A display apparatus includes a display panel, a data analyzer, a logic core and a latch. The display panel is configured to display an image. The data analyzer is configured to analyze input image data. The logic core is configured to compensate all of line data, compensate a part of the line data, or not compensate all of the line data according to an analysis result of the data analyzer. The latch is configured to receive compensated data from the logic core.

A display device of the invention includes a pixel unit including first pixels which display a first color; and a data driver which supplies first data voltages to the first pixels. The data driver includes: a first master gamma block including first master amplifiers which generate first reference gamma voltages; a first slave gamma block which generates first gamma voltages by dividing the first reference gamma voltages; and a first decoder which provides some of the first gamma voltages as the first data voltages, and each of the first master amplifiers is enabled or disabled based on a maximum luminance of the pixel unit.

Provided are a display panel and a display device. The pixel display panel includes a pixel driver circuit and the pixel driver circuit includes: a drive module, a first initialization module, a storage module, a threshold compensation module, a data write module and a light-emitting module. At least one of a transistor of the drive module, a transistor of the first initialization module and a transistor of the threshold compensation module adopts a first double-gate structure, the transistor adopting the first double-gate structure includes a control terminal and a first bottom gate electrode, and the first bottom gate electrode is configured to access to a first modulation voltage.

An electronic circuit adapted to drive a display panel including touch sensors and fingerprint sensors is provided. The electronic circuit includes a first circuit, a second circuit, a first switch circuit and a control circuit. The first circuit generates display driving signals for driving the display panel. The second circuit receives fingerprint sensing signals from the fingerprint sensors. The first switch circuit is coupled to a second switch circuit on the display panel. The control circuit generates control signals for controlling the first switch circuit and the second switch circuit, so as to control the electronic circuit to transmit the display driving signals from the first circuit to the data lines through the first and the second switch circuits in a first time interval, and control the electronic circuit to receive the fingerprint sensing signals from the fingerprint sensors through the first and the second switch circuits in a second time interval.