A light emitting diode (LED) module includes an integrated substrate, the integrated substrate including a plurality of LEDs; a glass substrate; and a signal wiring layer provided on the glass substrate. The signal wiring layer includes a plurality of signal electrodes configured to supply a data signal to the plurality of LEDs. The LED module further includes a conductive pattern provided on at least one surface of the integrated substrate, and connected to a ground.

A gate driving circuit includes a plurality of unit stages connected to each other, wherein each of the plurality of unit stages includes a first transistor having a lower gate electrode, an upper gate electrode disposed on the lower gate electrode, an active layer disposed between the lower gate electrode and the upper gate electrode, a first electrode contacting a first portion of the active layer, and a second electrode contacting a second portion of the active layer, a first capacitor defined by a first region in which the lower gate electrode and the upper gate electrode overlap, and a second capacitor defined by a second region in which the upper gate electrode and the first electrode overlap, wherein the upper gate electrode and the lower gate electrode are electrically coupled to each other in the first region where the upper gate electrode and the lower gate electrode overlap to form the first capacitor.

A display device is provided, the display device includes a first display portion, a second display portion not in a same plane with the first display portion, and a side display portion connected between the first display portion and the second display portion, a brightness of the second display portion is less than a brightness of the first display portion and a brightness of the side display portion.

A display device comprises anode electrodes respectively corresponding to sub-pixels, cathode electrodes respectively corresponding to the sub-pixels and respectively spaced apart from the anode electrodes, a cathode line electrically connected to the cathode electrodes, anode pads respectively overlapping the plurality of anode electrodes in a plan view, cathode pads respectively overlapping the cathode electrodes in a plan view, and a cathode line pad overlapping at least part of the cathode line in a plan view.

A display apparatus is disclosed. The display apparatus includes a display panel configured to drive a frame of a first resolution at a first frame rate, a communication interface comprising circuitry configured to receive content, and a processor configured to, based on a frame rate of the received content being greater than the first frame rate, adjust the received content to a second resolution, and to control the display panel to display a content of the second resolution at a second frame rate, the second frame rate being greater than the first frame rate.

A video input interface receives video data. An OSD circuit draws an intermediate layer in a target region in which an OSD character is to be overlaid on the video data, and overlays the OSD character on the intermediate layer.

A scan-type display apparatus includes an LED array, a display module, a control module and a driver module. The LED array has a common anode configuration. The control module generates a synchronization control (SC) signal. Based on the SC signal, the driver module outputs an input voltage to scan lines of the LED array sequentially without overlapping in time so as to drive LEDs of the LED array to emit light in a line scan manner, and generates an image refresh signal that is related to the output of the input voltage to one of the scan lines which corresponds to a last line of the line scan in each line scan cycle and that is further related to refreshing of images on a display constituted by the LED array and the display module.

A gate driver includes a plurality of active stages and a plurality of dummy stages. The active stage is configured to output a plurality of gate signals to a display region. The dummy stage is c connected to respective active stages and configured to output a plurality of dummy carry signals to the respective active stages. The active stage is configured to output the plurality of gate signals and a plurality of active carry signals. The plurality of dummy stages are configured to output the plurality of dummy carry signals, respectively, and not to output any gate signal.

A display device includes a display panel including a plurality of pixels, a controller configured to output image data and a gated clock signal, the image data including a plurality of pixel data for the plurality of pixels, and a data driver configured to receive the image data and the gated clock signal from the controller, and to sample the image data in response to the gated clock signal. The controller detects a repeated data pattern where same pixel data is repeated in the image data, generates a clock enable signal having an off level in a period in which the repeated data pattern is transferred, and gates an input clock signal in response to the clock enable signal to produce the gated clock signal.

To provide a semiconductor device, a liquid crystal display device, and an electronic device which have a wide viewing angle and in which the number of manufacturing steps, the number of masks, and manufacturing cost are reduced compared with a conventional one. The liquid crystal display device includes a first electrode formed over an entire surface of one side of a substrate; a first insulating film formed over the first electrode; a thin film transistor formed over the first insulating film; a second insulating film formed over the thin film transistor; a second electrode formed over the second insulating film and having a plurality of openings; and a liquid crystal over the second electrode. The liquid crystal is controlled by an electric field between the first electrode and the second electrode.