In a semiconductor device and a shift register, low noise is caused in a non-selection period and a transistor is not always on. First to fourth transistors are provided. One of a source and a drain of the first transistor is connected to a first wire, the other of the source and the drain thereof is connected to a gate electrode of the second transistor, and a gate electrode thereof is connected to a fifth wire. One of a source and a drain of the second transistor is connected to a third wire and the other of the source and the drain thereof is connected to a sixth wire.

A control method of an e-ink screen. The e-ink screen includes a plurality of pixels, at least one pixel includes first color charged particles and second color charged particles, and the first color charged particles and the second color charged particles are same in electrical property. The control method of the e-ink screen includes: inputting a first color driving signal to pixels expected to display a first color in the e-ink screen. The first color driving signal includes a plurality of sub-signals corresponding to a plurality of driving stages. The plurality of sub-signals include a first color imaging sub-signal and a particle separation sub-signal. The particle separation sub-signal is configured to drive the first color charged particles and the second color charged particles in the at least one pixel to move, and to separate the first color charged particles from the second color charged particles.

A display device includes: a display panel including a plurality of display areas, the display areas including scan lines, data lines, and pixels connected to the scan lines and the data lines; a first source driving circuit connected to the data lines of a first display area from among the display areas; a second source driving circuit connected to the data lines of a second display area from among the display areas; a first scan driving circuit configured to receive a first clock signal from the first source driving circuit and to output first scan signals to a first group of scan lines from among the scan lines based on the first clock signal; and a second scan driving circuit configured to receive a second clock signal from the second source driving circuit and to output second scan signals to a second group of scan lines.

A driving controller includes: a logo determiner configured to determine whether or not input image data includes a logo; a logo grayscale value calculator configured to calculate a logo grayscale value of a logo area corresponding to the logo in response to the input image data including the logo; a light emitting element life expectancy determiner configured to determine a life expectancy of a light emitting element corresponding to the logo area; a compensation reference grayscale value generator configured to determine a compensation reference grayscale value according to the life expectancy of the light emitting element corresponding to the logo area; and a logo luminance compensator configured to compare the logo grayscale value to the compensation reference grayscale value to determine whether or not to compensate a luminance of the logo area.

Embodiments of the present disclosure provide a method of driving display, and a display device. The method of driving display includes: scanning, progressively or rows by rows, a plurality of sub-pixels arranged in an N×M array, to turn on each row of sub-pixels scanned, so that a duration in which two adjacent rows of sub-pixels are simultaneously in an ON state is greater than or equal to two times a unit scanning time, wherein the unit scanning time is a time required for scanning a row of sub-pixels, N is an integer greater than 1, and M is an integer greater than 1; and applying data signals to at least two rows of sub-pixels simultaneously in the ON state, so that a duration of applying the data signals to each row of sub-pixels is greater than the unit scanning time.

A display device may include a display panel which displays an image based on a data voltage, a driving controller including a net power control setter which determines a scale factor for adjusting a gray scale of (N+1).sup.th frame data based on a load of N.sup.th frame data and a net power control reference value, where the driving controller generates a data signal based on input image data, and N is a natural number greater than or equal to 2, a data driver which converts the data signal into the data voltage and outputs the data voltage to the display panel, and a power supply voltage generator which senses a power supply current applied to the display panel in an N.sup.th frame and generates a power supply voltage based on a current level of the power supply current.

A display device includes a timing controller, a data driver controlled by the timing controller, and a display panel configured to display an image by the data driver. When a data signal is applied in an abnormal state, the data driver generates a voltage for display of black by itself, and supplies the voltage to the display panel.

The present disclosure discloses a display driving circuit. The display driving circuit is configured to have a function of detecting a short of a data line occurring on a display panel.

The present disclosure relates to a data processing device, a data driving device, and a system for driving a display device, and more particularly, to a data processing device, a data driving device, and a system capable of reducing power consumption of the display device.

A display device includes a display panel including a first pixel connected to a first initialization scan line and a first compensation scan line and a second pixel connected to a second initialization scan line and a second compensation scan line, a scan driving circuit which provides a first initialization scan signal to the first initialization scan line and the second initialization scan line in common and provides a first compensation scan signal and a second compensation scan signal to the first compensation scan line and the second compensation scan line, and a driving controller which controls the scan driving circuit. A delay time from a time point at which the first initialization scan signal transitions from an active level to an inactive level to a time point at which the first compensation scan signal transitions from the inactive level to the active level is less than one horizontal period.